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QuickLogic Announces Initial Public Offering
SUNNYVALE, Calif., October 15, 1999 -- QuickLogic Corporation (Nasdaq: QUIK) today announced the initial public offering of 6,667,000 shares of common stock at a price of $10 per share. Of those, one-half, or 3,333,500, were offered by Cypress Semiconductor, the sole selling stockholder. QuickLogic has given the underwriters an option to purchase up to 1,000,050 shares to cover over-allotments. The common stock will trade on the Nasdaq National Market under the symbol "QUIK."
BancBoston Robertson Stephens Inc. is the lead manager for the offering. Bear, Stearns & Co. Inc. and SoundView Technology Group, Inc. are co-managers. A copy of the final prospectus may be obtained from BancBoston Robertson Stephens Inc., 555 California Street, San Francisco, CA 94104, 415.781.9700; Bear, Stearns & Co. Inc., 55 Mercedes Way, Edgewood, NY 11717, 516.254.7135; or SoundView Technology Group, Inc., 22 Gatehouse Road, Stamford, CT 06902, 203.462.7200.
About QuickLogic
QuickLogic Corporation began developing the Embedded Standard Product (ESP) architecture in 1998, an innovation on its core Field Programmable Gate Array (FPGA) technology, that delivers the guaranteed performance and lower cost of standard semiconductor products and the flexibility and time-to-market benefits of programmable logic. QuickLogic's ViaLink metal-to-metal interconnect technology offers high performance and is the foundation of the company's ESP families as well as its core FPGA products. Founded in 1988 by the inventors of programmable array logic (PALã ), QuickLogic is located at 1277 Orleans Drive, Sunnyvale, CA 94089-1138. For more information please visit the QuickLogic web site at www.quicklogic.com
With QuickLogic?s new
WebASIC program,
you can receive
programmed FPGA and
ESP devices at no cost
? Free ASIC Prototypes in 24-48 Hours ? 64-bit/66 MHz Embedded PCI Controllers ? QuickLogic IPO ? Expanded European Support ? New Japan Sales Manager ? Low Density Devices for Cost-Sensitive Applications ? QuickWorks Version 8.1 Released
within 24-48 hours of sending us your design data via the Internet. Created to speed time to market, the WebASIC program also offers a way to solve the performance and pin-locking problems associated with traditional SRAM-based FPGAs by allowing you to easily retarget your designs to QuickLogic devices.
QuickLogic?s FPGA and ESP products feature a unique combination of high performance, reliability, and security along with low power consumption and short development times. As a result, a number of leading companies use QuickLogic devices in data and telecommunications, video, graphics, and imaging, instrumentation and test, computing and military applications. |
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