Looks like the new Xeon's reign as the largest die ever will be short lived.
*** HP Extends PA-RISC With 8700
By Kevin Krewell
HP plans to update its PA-RISC offering in 2001 with the PA-8700, which will have larger caches and higher frequencies than the 8600 it ships today. Shipments of the 8700 are expected to begin in the first half of 2001. HP is projecting a minimum clock speed of 800MHz, which is not terribly impressive considering that Intel should have Willamette-based Foster processors running at nearly twice that speed by then. HP, however, believes that next year the 8700 will deliver performance competitive with that of other 64-bit server processors, such as Intel's Itanium, Sun's UltraSPARC III, and IBM's I-Star. HP continues to enhance the PA-RISC line, even though it has invested heavily in the IA-64 architecture, as it cannot afford to wait until its existing customer base accepts the IA-64 architecture. In the meantime, HP will use advanced process technology to move PA-RISC processors forward.
An extraordinarily large on-chip L1 cache has characterized each member of the 8x00 family since the 8500. The 8700 continues in this vein, pushing the limits with 2.25MB of on-chip L1 cache. This amount of cache has been made possible by HP's foundry partner for the 8700, which is capable of supplying a 0.18-micron seven-layer-copper silicon-on-insulator (SOI) process. These are process features that only one foundry is expected to offer in early 2001--IBM Microelectronics. HP has also made some architectural enhancements to the 8700, adding features such as data prefetching, a quasi-least-recently-used (LRU) replacement policy for the data cache, and a 44-bit physical address space.
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