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Technology Stocks : Intel Corporation (INTC)
INTC 42.61+6.5%Jan 7 3:59 PM EST
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To: Windsock who wrote (150954)12/4/2001 12:32:55 PM
From: Elmer   of 186894
 
All of the statements in Paul's calculations are absolutely solid facts with the exception that the assumption of 10,000 wafer starts per week.

Even at 7000 WSPW their numbers are terrible. My calculations show they should have at least 2X the capacity they now produce.

Standard yields on a new process are 70% or better initially and go up from there to 80% or even 90% on a mature process.

Winsock, this point needs clarification. Quoting yields in percentages is meaningless because of differing die sizes. 80% yield would be incredibly good for a very large die and incredibly bad for a very small one. The defect density for the process plus die size gives predicted yield. Seeing as die size is a constant for Athlon the only way to reduce yield is to increase the defect density (or general misprocessing).

The problem we face is accounting for such disasterously low yields. I find it hard to believe that defect density alone could do it. It is far more likely that they are simply losing lots of wafers because of misprocessing in trying to achieve their 70nm channels. Nobody could have these terrible yields without some real extenuating circumstances. Another possibility is they have decent yields but must scrap half their production due to poor binsplits. Bottom line is that for whatever reason less that half the expected output is coming out the door.

EP
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