Formerly About Advanced Micro Devices Message Board

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Politics : Formerly About Advanced Micro Devices

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To: Charles R who wrote (102531)	4/6/2000 2:36:00 AM
From: Tenchusatsu	of 1575776

Chuck, <My personal favorite would be a deeply pipelined 2 ALU 2 FPU (2-128bit ops per clock) with a large cache and without any serious out-of-order execution. I like such a beast because it would make a killer desktop/laptop part.> I remember back during the times when RISC was becoming a buzzword. The idea was to reduce the complexity of the instruction set so that techniques like superpipelining and superscalar designs could be implemented more easily. Now it seems you're arguing for reducing the parallelism and the out-of-order complexity in favor of even higher clock speeds. Sounds interesting, if only in theory. Realistically, though, I think IPC would be impacted too much for high clock speeds to overcome. So I guess it's a balancing act and an attempt to find the sweet spot between IPC and high clock speeds. By the way, we could also throw in TLP (thread-level parallelism) into the equation. IBM and AMD already announced multi-core designs, and Compaq/Digital has already announced symmetric multithreading. These techniques seem to be the new rage in processor architecture. Tenchusatsu

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