AMCC Adds Two New Dual-Frequency, Single-Chip Transceivers For
Gigabit Ethernet And Fibre Channel Applications; New Bipolar Devices
Integrate Additional Functionality, Simplify Design With Addition Of
Reference Clock Input and Dual I/O
Business Wire - September 29, 1997 08:03
AMCC %CALIFORNIA %COMPUTERS %ELECTRONICS %COMED %PRODUCT V%BW P%BW
SAN DIEGO--(BUSINESS WIRE)--Sept. 29, 1997--
See Applied Micro Circuits Corp. At Networld+Interop Booth No. 2055
Applied Micro Circuits Corp. (AMCC) has extended its single-chip platform of dual-frequency Gigabit Ethernet and Fibre
Channel transceivers with the addition of two new bipolar devices that provide added functionality to simplify design of Gigabit
Ethernet products.
The first new device, the S2053, integrates a PECL reference clock input that allows a common clock to be distributed
throughout a Gigabit Ethernet system, while maintaining high signal quality. The second new transceiver, the S2054, integrates
both the reference clock input and dual high speed input/output (I/O) for network applications that require redundancy.
Both new devices are port transceivers targeted for use in network switches, hubs and routers. They are based on AMCC's
original S2052 dual-frequency transceiver, which became the first chip of its kind to support both Gigabit Ethernet and Fibre
Channel frequencies when it was introduced in January 1997.
The transceivers are designed using AMCC's proprietary bipolar technology to achieve a low-power solution with low jitter.
The S205X transceiver family is ideal for OEMs who are designing both Fibre Channel and Gigabit Ethernet equipment. The
dual-frequency transceivers give equipment designers the option to work with one cost-effective solution that meets a wide
range of transceiver design requirements.
AMCC's roadmap for future transceiver products also allows OEMs to migrate their designs to higher levels of integration and
performance.
"The introduction of these new dual-frequency port transceivers underscores AMCC's commitment to deliver compelling,
cost-effective solutions to our OEM customers," said Tim Thompson, product marketing manager, AMCC.
"As the networking market continues to grow and change, AMCC is committed to extending our transceiver family to meet the
market's demands for functionality and economy with highly integrated, cost-effective solutions."
To simplify design of Gigabit Ethernet systems, the new S2053 transceiver integrates a differential Pseudo Emitter Coupled
Logic (PECL) reference clock input to allow use of a common clock distributed throughout the system.
A switch with multiple Gigabit Ethernet ports will typically require a common clock. Use of PECL logic for this reference clock
input allows better signal quality to be maintained, compared to TTL logic, because ECL's low amplitude voltage swings do not
degrade signal quality. In addition, the parallel interface timing specifications of the chip have been adjusted to allow greater
margin when designing ASIC Gigabit Ethernet controllers.
The S2054 transceiver includes the same added functionality as the S2053 plus dual high speed outputs and inputs for
applications that require redundancy. This redundancy is useful for switches with high availability requirements. Designers can
use the dual I/O to drive two separate optical modules for switch port applications, or two switch fabrics for serial backplane
applications.
Each of the three products in the S205X transceiver family contain a 10-bit data interface and support all three data clocking
options recommended by the ANSI specifications. These transceivers are targeted at applications ranging from Fibre Channel
adapter cards, servers and RAID storage devices to Gigabit Ethernet network interface cards and high-speed ports on
switches and hubs.
With their high level of interface flexibility, the S205X transceivers are also well-suited for designers of Gigabit Ethernet systems
who are developing migratory products and need the broadest possible interface options as this market quickly evolves.
The new S2053 and S2054 transceivers are fabricated in AMCC's established, low-power bipolar process, and are designed
to perform high-speed serial data transmission over fiber optic, coaxial, or twinaxial cable interfaces conforming to the
requirements of the Fibre Channel X3T11 and proposed IEEE 802.3z specifications.
The transceivers use AMCC's proven, SONET interface technology with its innovative Phase Locked Loop (PLL) architecture
that allows the chips to meet or exceed the Fibre Channel and 802.3z jitter specifications. The transmit PLL synthesizes the
high-speed clock from a low-speed reference, and the receiver PLL synchronizes to the incoming data stream to recover the
clock and data.
Incorporating an advanced lock-detect feature, the S2052X transceivers continuously monitor the incoming data streams for
data integrity. This feature eliminates the need for downstream clock multiplexers and signal detect functions on the optical
receiver. The lock-detect circuitry guarantees continuous and glitch free receive byte clocks during startup and loss of signal
conditions, thereby improving system stability.
Like their S2052 predecessor, the S2053 and S2054 feature low-jitter, differential PECL-compatible I/O for fiber optic
interfaces to minimize crosstalk and maximize data integrity. Other key features include local loopback for system diagnostics,
and on-chip filter components eliminating the need for external capacitors.
Packaged in 64-pin plastic quad flat packs (PQFPs), the S2053 and S2054 each use a 3.3V power supply and dissipate only
0.8 and 1.0 watts, respectively. The AMCC S2053 transceiver will begin sampling in September 1997 and is priced at $18
per unit in 1,000 piece quantities. The S2054 dual I/O transceiver, scheduled to sample in October 1997, is priced at $19.50
in 1,000 piece quantities. Volume production for both devices is scheduled for fourth quarter, 1997.
AMCC develops, manufactures and markets high-speed, high reliability system interface products for data communications,
telecommunications, and PCI-based computer applications.
A leading supplier of bipolar ASICs since 1979, AMCC's corporate headquarters and wafer fabrication facilities are located in
San Diego, Calif. Sales and consulting engineering offices are located throughout the world. For further information regarding
AMCC and its products, write: Marketing Communication Department, AMCC, 6290 Sequence Drive, San Diego, Calif.
92121-2793; or call 800/755-AMCC (800/755-2622) or 619/450-9333; or fax 619/450-9885; or E-mail nwpr@amcc.com;
or visit our Web site at amcc.com . |
