[ TXN DSP Chip ]
March 24, 1997, Issue: 946
Section: Digital Signal Processing
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Application-specific kernel makes mark
By Yogendra Jain, Vice President and General Manager, RadiSys DSP Division, Wellesley, Mass.
Major leaps in hardware and software technology are fueling the need for a new type of programming model for digital signal processors. Now that these devices have evolved from simple bit-slice computers to the most recent 1,600-Mips TMS320C6X from Texas Instruments Inc., the design and integration of intelligent, application-aware kernels is emerging as an increasingly important approach.
These smart kernels, tailored for specific applications, ensure efficient high-level programming by incorporating awareness of algorithms, hardware control, I/O and system interface. For example, the telecom kernel for the TMS320C6X that RadiSys DSP Division is developing promises to reduce system-level programming and integration efforts by as much as 50 to 75 percent in the life of the product.
The problem of programming single and multiprocessing DSP systems got worse when new graduates specializing in software engineering and computer science entered the work force. This new breed of programmer was more comfortable working in C using the high-overhead OSes. This resulted in non-efficient use of DSP Mips and memory resources.
In past DSP applications, the focus was on signal-processing, multiply-accumulate and bit-twiddling functions. System-level controller functions were devoted to a controller chip such as the i960, 386, 486, 68030, 8051 and so on. Now, as competitive and time-to-market pressures are building, DSPs are being tapped to perform controller functions, reducing system costs by lowering the number of components and minimizing the number of processors in a box.
For example, in a recent project for a communications application developed by RadiSys DSP Division (formerly Sonitech International), only 15 Mips of raw signal processing for modulation/demodulation is required. The remaining 5 Mips of a TMS320C32 floating-point processor is devoted to traditional controller functions such as detecting incoming protocols, controlling keypad, liquid-crystal display, RS-232/RS-485, digital input and output, and data record/playback to and from a large flash memory. If the DSP runs out of Mips, a higher-speed DSP (up to 30 Mips) can be substituted in many cases, or a more efficient implementation of the algorithm can be used.
In addition to the signal-processing and controller functions, DSPs are being used for packing, unpacking and formatting data. For example, in networking applications, the data can be formatted by a DSP as high-level data-link control frames, Internet Protocol packets or ATM cells directly onto E1/T1, MVIP or SCSA voice over frame relay or IP interfaces. In these applications, DSPs will not only do voice coding and echo cancellation, but also packet framing, call progress, frame-relay access and PBX interface handling. In a typical multimedia station application, the DSP will perform video compression (H.263), audio compression (G.723.1) and V.34 modem signal-processing tasks as well as data-management and protocol functions according to the H.245 standard.
In video/image processing, certain standards-JPEG, MPEG, H.261, H.324, etc.-need to work together with other standards. For a typical voice-coding application, the DSP encounters a multitude of algorithms, protocols, I/Os and control sequencing. As more and more applications become standardized, there will be a layer of protocols surrounding the data. The DSP will be required to strip away the protocol, extract and process the data, modify the protocol headers, pack the data and pass it to an I/O device.
Hitachi Ltd.'s SH-DSP core, a combination of RISC and DSP architecture, allows both microprocessor and signal-processor functions at 60 Mips. Likewise, ZSP Corp. also combines DSP and RISC architectures in one device. Like the SH-DSP and ZSP entries, many of the new DSP cores have controller functions together with DSP functions. The powerful TI C6X architecture not only allows both controller and DSP functions but also is able to process multiple channels on one piece of silicon.
As these new DSPs begin taking over the roles of other processors, the programming paradigm needs changes. The DSP is now required not only to deliver efficient execution of algorithms, but also to manipulate data I/O and perform general-purpose microcontroller-like functions-all for multiple channels and multiple algorithms on each of these channels. This is the challenge posed by TI's new VLIW TMS320C6X processor.
Subroutines, macros and libraries simplify repetitive programming tasks and organize the process of developing software. Similarly, an application-specific kernel brings that programmability to an even higher level. These application-specific kernels are the solution to the next generation of real-time digital signal processors.
In the RadiSys telecom kernel for the TMS320C6X (Task-6000), the application developer can maintain focus on application integration while the Task kernel manages the hardware and software functions. More specifically, the kernel is hardware, processor and data aware. Because of its hardware awareness, it is able to allocate the appropriate memory internally and externally for optimal performance. It can also avoid pipeline conflicts, use the DMA resources for transfers and make efficient use of program and data cache. Other components of the kernel include device manager, hardware configurer, task scheduler, shared data manager, timers and event managers.
The kernel exploits data locality in streaming and storage of data and intermediate results and parameters. For example, in a voice-compression/decompression application, 10 milliseconds of speech data must be processed and transmitted to avoid speech jitter on the receiving side. Simultaneously, the data must be received, decompressed and passed to a host system, PBX or other I/O device. Most telecom applications have common data-flow elements of full duplex, fixed packet size, insertion and extraction of packets from a data stream and I/O data to multiple (up to 32) channels. They need algorithms for echo cancellation, voice encoder and decoder, fax data pump, call-progress monitoring, and so on.
The kernel takes advantage of the determinism of the application. With the Task-6000 application-programming interface, programmers can shift their focus from writing low-level code for data stream, memory management, etc., to integrating and verifying the application with upper system-level layers. More applications can be swapped in and out easily, multiple engineers can work with the same API, and code maintenance, testing and upgrades become easier. Furthermore, functions typically allocated for the controller are all part of the kernel and are done on the DSP.
The Task-6000 kernel is packaged as a C-linkable library that directly integrates with the application. For host-based applications, a host library that communicates with the Task kernel is provided. This host library provides high-level message passing between the host and the kernel. In a typical application, the main control code calls the kernel device manager to open a device-for example a T1 line-using application-specific parameters such as number of channels, bit rate and source/destination of the data. After initializing the I/O devices, the application calls the kernel to send/receive the data, and processes the data using telecom-specific libraries. For time-critical processing, the application can provide handlers that are invoked by the kernel as soon as the data is available.
Distributed loads
Some applications in computer-telephony integration require dynamic load distribution. Some may have multiple C6X DSPs. The next generation of these kernels will need to support preemptive scheduling and load balancing for multiple data channels and multiple functions.
Researchers have long seen the need for application-specific kernels. But only now-with highly integrated, high-Mips DSPs equipped with efficient compilers, profilers and debugger tools-is development of an application-specific kernel possible. The traditional software-programming and hardware-design paradigm must shift to the design and implementation of intelligent, application-aware kernels. Such a change will require significant engineering and management support but is a necessary requirement for continuing the evolution of digital signal processing.
Copyright r 1997 CMP Media Inc.
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