Warning...continuation of a very technical discussion...
>>Yes, but CPU companies have simulation programs that they have evolved over the years, purchased or in-house grown. These programs, especially if they have been tweaked to optimization for CPU architectures that have also been around for a few years, can be remarkably accurate in predicting performance. [...stuff deleted...]<<
You're absolutely right. The problem with giving precise guidance is the application mix and the changing application "footprints" that occur mixed with the scheduling policies of the operating systems and the change in those policies over time.
I think we totally agree that this stuff is a science and can give you amazingly accurate results. The trouble is when someone wants to give a single number that would specify the performance increase due to a specific change. You can do it, but you have to hold constant what you load into these simulation programs (i.e., the trace data).
I'm not trying to quibble here but to underscore the basic point that I think we're both trying to make. When someone talks about RDRAM performance, an honest engineer will tell you that it is variable based upon a wide number of factors. What I think people miss when they here all of the technical discussion is that Intel, who has some fantastic simulators and trace generators (or at least did several years ago when I last had access to them), is designing their microprocessors and chip sets to optimize them both for their best guess at application loads, but more importantly for Rambus products.
Tony...I'm sure you understand this next part, but I'm writing it for general consumption.
What does this practically mean? It means that I would guess you'll see larger cache lines and correspondingly larger amounts of anticipatory prefetch into the cache. This has been and will be tuned such that the bandwidth of the Rambus interconnect is absolutely maximized.
I realize that many feel that Intel can throw Rambus away at the moment it becomes convenient. And I don't doubt that Intel can delay, and even avoid, Rambus products if they really have a reason to. But it would hurt Intel to do so. Intel has for several years now been designing microprocessors and chip sets in anticipation of increased bandwidth; if they don't get it they will be hurt when compared to AMD and their other competitors. But more importantly, in my opinion, Intel customers will have less reason to move up in the Intel product line, which will reduce Intel's ASP and subsequently their gross margin.
There are many so called "strategic" relationships in the technology world which are all form and no substance. This isn't one of them. This is a major plank in the platform I build for continued investment, and confidence, in Rambus.
My best, |
