Formerly About Advanced Micro Devices Message Board

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Politics : Formerly About Advanced Micro Devices

Public Reply Prvt Reply Mark as Last Read File

Previous 10 Next 10 Previous Next

To: Petz who wrote (24825)	10/14/1997 7:04:00 PM
From: Patient Engineer	of 1577569

John, Re: AMD Roadmap Chaos. I was at MP forum. The new MMX instructions are completely different from vendor to vendor. Intel didn't announce anything, so now there are only 3 new x86, er, IA32 instruction sets to deal with. Very likely that Intel's new additions in Katmai will stomp all over the opcodes used by IDT, Cyrix and AMD (if they don't know, you can bet that Intel will make sure they do by 1999). You should have seen the Intel guy. He was loving the confusion as the various panel members hemmed and hawed about what they would do when Intel comes out with the "real" MMX2 instructions in a year and a half. Cyrix said they would abandon their instructions, IDT said that they only wanted Microsoft to use their instructions. AMD said nothing. The Intel guy just laughed and said he didn't think these instruction sets are going to be adopted by the ISVs. K7 is NOT using slot 1. They are using the slot 1 physical form factor, but they are using the Alpha bus protocol. More chaos. It turns out that Intel can prevent AMD from using Slot 1 (according to Michael Slater). So Intel is inflicting this chaos on the industry. The same could be said about the instruction set confusion. Worst of all is that AMD's extentions to their 6th generation processor are a disappointment technically. Their additions to MMX are unspectacular except for their incompatibility (they will help 3D considerably if anyone uses the instructions). Most disappointing is that they chose not to fix the K6's floating point unit. It is still not fully pipelined. So the K6-3D and K6+3D (what a terrible marketing name), will both lose to P2 on typical FP benchmarks and games (except those employing the new instructions. The new MMX instructions will not be out in volume until mid to late 1998, by which time Intel will be previewing Katmai. That will freeze the market. AMD will realize they need to reverse themselves and quickly implement the new Katmai instructions. The parts will either be delayed or receive a confused response in the market. There is plenty of fodder here for the FTC, but then we aren't investing in the FTC.

Report TOU Violation

Share This Post

Public Reply Prvt Reply Mark as Last Read File

Previous 10 Next 10 Previous Next