Max: Well, I'm sorry but I once again have to disagree.
Well, you're certainly welcome to do that ;-)
The indication that Palomino would start at no less than 1533MHz is a sign that it's currently binnig very well. That server chip was in fact a mobile part (*MAYBE* with more cache) with reduced voltage and PowerNow! support.
Well, I disagree here ;-).
At this point, AMD have to say that Palomino will start at 1533MHz. Certainly, Palomino will have to take over roughly where Tbird leaves off - less is just not an option. For that reason, I consider the 1.53GHz claim for Palo intro to contain virtually no useful information regarding bin splits.
If Palomino reaches such high operating frequencies, why not demo it at those high frequencies? Why demo it at speeds reached over 12 months ago?
900MHz at 1.4V is no indication of bad binsplit at all.
The 1.4V operating voltage is, in itself, not indicative of anything regarding bin splits. I would argue, however, that the 900MHz is.
However, the overall yield (ratio of sellable chips) could be a problem if the size is effectively 150 mm2... One thing that is sure : TBird ... brings more volume than Palomino.
If the 150mm² number is in fact correct, then that's certainly an issue. However, introducing the chip into the narrow market of servers would still be an option.
Actually, the best theory I read is that PowerNow! is rather big and the desktop version will be around 110 mm2.
I disagree with the sentiment that PowerNow! takes up a lot of die space. Rather, I believe the reason for omitting it in the feature list of the desktop chip is to avoid them being sold in place of the mobile Palomino chips. Most likely, PowerNow! is present in all Palominos, just deactivated in the low-ASP desktop segment.
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