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Politics : Formerly About Advanced Micro Devices

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To: Petz who wrote (37077)	9/16/1998 3:35:00 PM
From: Paul Engel	of 1581513

Petz - Re: "Introduction of 8 new 128 bit = 4 x 32 bit wide single precision packed CPU registers, enabling the computation of 4 single precision FP variables at the same time." Don't you think there is a mode for executing 2 Double Precision operations (2 x 64) at the same time? Maybe Tom didn't get it right, just as you noted he "boo-booed" on " Tom is in error when he states that AMD's implementation is only capable of 2 single precision floating point ops per clock cycle" You only believe this character when his output fits your desired input. Paul

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