"Okay, fast forward to a year and a half from now. Dresden is not only a full capacity, but it is miraculously at full 130nm capacity. I am assuming here that Austin is staying 180nm based on the above quote, though I have no clue about it either way. That'll stick the capacity up to 45+55x2 = 155. Sweet, huh? That's a raw capacity increase of 96.0% compared to the current moment."
Let us instead assume a slightly different scenario. This time for the end Q1 2003.
Jerry states that all processor capacity will be at 130nm by the end of 2002. This means either Fab25 will be at 130nm or Fab25 will be converted entirely over to flash. They also claim to have sufficient capacity to meet demand through 2003.
The best fit to these claims is that Fab25 will use low-k dielectrics to take advantage of a shrink to 130nm, and Fab30 will be at a combination of SOI and bulk silicon at 130nm. With this assumption, AMD could keep Fab25 viable as a processor fab through the end of 2003 only by producing value segment Hammers at Fab25 starting no later than Q2 2003.
AMD claimed to be at 60% ramp of wafer starts at Fab30 at the end of the Q1. This would probably mean that 10 weeks prior to the end of the quarter AMD would have probably been at about 51.7% of full ramp, which would have been the rate for shipment volume at the end of the quarter. Assuming the same rate of ramp in Q4 2000, the shipment volume would have been 41.7% of full ramp at the beginning of the quarter, for an average ship volume of about 46.7% of total ramp.
Fab25 is rated at 6000+ wafer starts per week. Fab30 is rated at 6000 wafer starts per week at full ramp. For convenience we will assume 6000 wafer starts per week for Fab25 plus 6000x0.467=2800 wafer starts per week at the end of Q1 2001.
Using the ratio of 10% K6, 45% Duron, 45% Athlon, we would have 0.1x82 + 0.45x99 + 0.45x120 = about 107mm2 for average die size at 0.18-micron.
Assuming an average die size of 115mm2 for Hammer, 80mm2 for Athlon and 70mm2 for Duron at 130nm, and that Hammer accounts for 10% of the market with Duron and Athlon each accounting for 45% of the market, we would have 0.1x115 + 0.45x70 + 0.45x80 = about 79mm2 for average die size at 0.13-micron.
This would be at least a 34% increase in the number of die per wafer. Assuming a 10% increase in percentage yield this would result in at least a 48% increase in units shipped per wafer. Factor in an increase from 8800 wafer starts per week to 12000 wafer starts per week and the result would be an increase to about a 100% increase in unit volume over two years. Over two years the total market should increase by about one third, resulting in a 50% increase in market share. This would take AMD from 21.3% to about a 32% market share by the end of Q1 2003.
The problem would come in 2003. With both Fab25 and Fab30 both at 100% ramp of 0.13-micron process technology, AMD could neither increase their number of wafer starts per week nor increase the number of die per wafer. Indeed, as AMD shifts production from Athlon/Duron to Hammer, average die size would rise rapidly. Since AMD claims they will be migrating the Hammer core throughout all market segments faster than they did with K7, we can assume that Hammer will account for at least as high a percentage of Hammer processors by the end of 2003 as Athlon/Duron processors at the end of 2000. Clawhammer will have a 31% larger die size than Athlon at 0.13-micron and the value segment Hammer will be at least as great a percentage larger than Duron. Add in the higher percentage of Sledgehammer die by the end of 2003, and AMD's maximum market share sustainable from inhouse production would drop to 22.5%. Even worse, this assumes that AMD will not have to start converting Fab25 to flash production before the end of 2003. |
