ISSCC: Broadband consumer apps will drive silicon, keynoters say
eetimes.com
By Rick Boyd-Merritt
EE Times
(02/12/99, 11:34 a.m. EDT)
SAN FRANCISCO — The merger of consumer electronics and
broadband networking will drive semiconductor technology in the next
decade, keynoters will tell the International Solid State Circuit Conference
this month. They will articulate the new religion of what is increasingly seen
as a post-PC world in which Mips, megahertz and data processing take a
back seat to multimedia applications and new ways of measuring progress
in silicon.
In the first of three ISSCC keynotes, Haruo Nakatsuka, vice president and
chief research officer of Toshiba Corp. (Kawasaki, Japan), will sketch out
the image of a home server in 2003 that leverages deep-submicron process
technology to blend digital television, 3-D graphics and interactive services.
Such a system will need 0.15-micron technology to craft a highly parallel
chip that processes 50 million polygons/second and runs at 2 GHz to
handle MPEG-4 processing of Internet, telephone and TV data streams.
Pointing the way to such silicon, Toshiba and Sony Computer
Entertainment jointly will detail a 128-bit processor with 10 floating point
multiply-accumulators and four floating-point divider units built in a
0.18-micron process. The chip, which supports MPEG-2 decoding, is
believed to be a central part of a next-generation Sony Playstation that
could merge high-end 3-D with DVD-based games.
"It would be a big thing to bring DVD-quality video to a game," said Peter
Glaskowsky, senior analyst for 3-D graphics and multimedia at the
Microprocessor Report. It's not yet clear how the Toshiba chip would
compare with its closest competitor, Hitachi SH-4 used in the
CD-ROM-based Sega Dreamcast video console, which processes about 2
million polygons/second, he said.
Fueling the post-PC fervor, Theo Claasen, chief technology officer of
Philips Semiconductors (Eindhoven, Netherlands) will argue for a new way
to benchmark silicon for a future world in which telephone and video
services are readily delivered over both the Internet and cellular systems
and DVD is a mass-market product. Signal-processing, measured in
millions of operations/W will be the metric for tomorrow's media
processors, rather than Mips or megahertz touted in today's
data-processing chips.
"Design aiming at optimum speed rather than maximum speed is the ultimate
art of digital design," Claasen writes.
In the last of three keynotes, Henry Samueli, chief technology officer of
Broadcom Corp. (Irvine, Calif.), will come to grips with an increasingly
fragmented landscape of emerging broadband networks from cable
modems and Gigabit Ethernet to HDTV and digital subscriber lines.
Samueli's vision of these evolving networks is primarily upbeat, forecasting
— among other things — the emergence of a single-chip processor for a
high end set-top box using 0.18 micron technology. But the cofounder of
Broadcom also sees significant design challenges, chiefly in mixed-signal
design for integrated system chips that drive these new networks. As digital
CMOS parts push toward lower voltages and power dissipation they will
increasingly cramp even the most sophisticated analog designs, he warns.
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