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Technology Stocks : AMD K6 versus Cyrix M2
AMD 216.65+0.7%1:38 PM EST
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To: Steve Porter who wrote (32)2/14/1997 2:17:00 AM
From: David Taylor   of 92
 
Steve and All,

I would like to correct a few errors that have been repeated about 10 times!

First INTEL already has TWO pipelines for MMX instructions, CYRIX has ONE pipeline for MMX instructions and I am not sure about AMD.

BUT: This does not automatically mean that Intels MMX implementation will be better than CYRIX's. For a start Intels MMX implementation slows to a crawl of there is constant use of both MMX and the floating point unit. This alone is very good news for Cyrix because it means that most games will avoid the FPU as MMX gives better performance in most cases (This is good because Cyrix does not have a very good FPU).

Most CYRIX MMX instructions have a lower latency than on Intels implementation.

BUT most importantly not all Intel MMX instructions can be issued in parallel anyway. Note that on the Cyrix chip an MMX instruction can be issued down one pipeline with an integer instruction down another.

SECONDLY:

Intel has implemented MMX as an extention of the INTEGER UNIT not the FLOATING POINT UNIT, yes their MMX implementation maps the MMX registers onto the FLOATING POINT registers, but it is implemented as an extention of the INTEGER UNIT.

You can all check out this reference if you dont believe me!
(Note it is technical)

developer.intel.com

I believe that Cyrix has however implemented MMX as an extension of the Floating Point Unit?? (Not positive of this) and this may mean that it will have more free pipelines to execute integer instructions in parallel with MMX instructions.

I hope this information was useful.

Regards,

David Taylor
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