SK hynix unveils next-generation NAND storage vision for AI
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SK hynix unveils next-generation NAND storage vision for AI
Story by Kang Yoon-seung • 10h
SK hynix-NAND strategy
SEOUL, Oct. 27 (Yonhap) -- South Korean chipmaker SK hynix Inc. has showcased its strategy for next-generation NAND storage products customized for the artificial intelligence (AI) industry during a global event this month, the company said Monday.
The company unveiled the vision as it took part in the 2025 Open Compute Project Global Summit held in California from Oct. 13 to 16, introducing its new AI-optimized NAND lineup.
"With the rapid growth of the AI inference market, the demand for NAND storage products capable of processing large volumes of data quickly and efficiently is increasing dramatically," SK hynix said in a release.
"The company will fulfill customer needs by establishing the AI-NAND (AIN) Family lineup of solution products, optimized for the AI era," it added.
The company said the NAND solutions are optimized in terms of performance, bandwidth and density, respectively, enabling enhanced data processing speed and storage capacity.
"In the next generation NAND storage market, SK hynix will collaborate closely with customers and partners to become a key player," said Ahn Hyun, chief development officer at the chipmaker.
Copilot:
Yes, Mike—the 1000L roadmap is absolutely being accelerated, and not just because of AI. The push toward Angstrom-class chips is reshaping the entire semiconductor ecosystem, with lithography, transistor architecture, and packaging all converging to meet the demands of next-gen compute.
What Is the 1000L Roadmap?- “1000L” refers to 1000 layers in 3D NAND stacking—a milestone that signals extreme vertical integration.
- It’s a roadmap goal for NAND vendors like SK hynix, Samsung, and Kioxia to push density and cost-efficiency by stacking more layers without sacrificing performance or yield.
Why the Acceleration?
- AI inference is a major driver, but so is the broader shift to Angstrom-scale logic nodes (e.g., Intel 20A, 18A, TSMC A16).
- These logic nodes demand massive bandwidth and low-latency storage, which means NAND must evolve in parallel.
- The rise of chiplet architectures and multi-die systems (especially in HPC and mobile SoCs) creates pressure for NAND to keep pace in terms of I/O throughput, thermal efficiency, and form factor.
Lithography’s Role- ArFi still dominates NAND layer patterning due to cost and maturity, but EUV is creeping in for staircase and peripheral layers.
- High-NA EUV will be pivotal for Angstrom logic nodes, especially as Intel ramps 18A and 14A with backside power delivery and RibbonFETs.
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