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To: Bald Man from Mars who wrote (4222)8/31/1998 2:35:00 PM
From: Mitchell   of 6565
 
VLSI and DSP Group Announce DSP Group's New PalmDSPCore

Business Wire - August 31, 1998 08:21

SAN JOSE, Calif.--(BUSINESS WIRE)--Aug. 31, 1998-- Next family of DSP cores feature flexibility and performance to
meet the needs of next generation embedded DSP systems

VLSI Technology, Inc. (NASDAQ:VLSI) and the DSP Group (NASDAQ:DSPG) today announced DSP Group's new
PalmDSPCore(TM).

The new core, which VLSI is the first to license, is another addition to VLSI's extensive embedded core roadmap that
provides the needed flexibility and scalability for customers to optimize their price/performance requirements.

The PalmDSPCore is a parallel DSP architecture providing the performance and flexibility customers need to meet the
demands of leading edge embedded DSP applications. The PalmDSPCore is the fourth and newest member in DSPG's
SmartCores(TM) portfolio of DSP cores, following the PineDSPCore(R), the OakDSPCore(R) and the TeakDSPCore(TM).
New Features

The following features differentiate the PalmDSPCore from the other DSPG SmartCore products:

- A truly parallel dual-MAC architecture

- Configurable data path (16-, 20- or 24-bits) to meet
application specific needs

- Three instruction formats (16-bit, 32-bit parallel and 32-bit
multi-parallel) ensure optimal code density

- A synthesizeable soft core to ensure ease of migration to future
device technologies

- A 150Mhz clock at 0.2 micron technology yielding 450
OakDSPCore-equivalent Mips

Designed for Next generation DSP Products

PalmDSPCore is designed for embedded applications that require high processor throughput and architectural flexibility such
as GSM/CDMA handsets, third generation IMT-2000 wireless products, high-speed Data Subscriber links (e.g. xDSL),
pooled modems, Internet gateways and multimedia applications.

Developed by the DSP Group in cooperation with VLSI, PalmDSPCore confirms both DSPG's leadership as a DSP core IP
provider, and VLSI's leadership in embedded processor-based system-level-silicon solutions.

"The combination of VLSI's experience in system-level silicon and DSP Group's architectural expertise has allowed us to
define a next generation DSP core that meets the cost, performance and power requirements of high and embedded DSP
systems," said Ray Slusarczyk, VLSI's Director of Embedded Processing Division. "The Palm is the next step in our
embedded core roadmap, which features enhanced ARM family processors, the enhanced OAK+ DSP and multicore
RISC/DSP products. The PalmDSPCore is a significant step beyond traditional filter orientated DSPs and we are proud to be
the first vendor to bring this revolutionary architecture to market."

"We are very proud to have VLSI Technology as our first licensee for this state of the art technology, that was realized in the
PalmDSPCore family of 16, 20 and 24 bit DSP cores," said Gideon Wertheizer, corporate vice president of marketing for
DSP Group.

"Our partnership with VLSI Technology has proven to be valuable for both parties," said Eli Ayalon, President and CEO of
DSP Group. "Our plan is to establish the PalmDSPCore as a defacto standard embedded DSP through a large install base of
licensees (currently more than 30 licensees have signed up for DSP Group's SmartCore family) and ready to use third party
software," Ayalon added.

Will Strauss, president of Forward Concepts, a market research firm in Tempe, AZ, said, "PalmDSPCore is a powerful
platform that will be a basis for VLSI to address the next-generation DSP applications that are only now being defined. The
flexibilty of the data precision and instruction types will allow PalmDSPCore to be near optimal for a number of high volume
applications."

Parallel Dual-MAC Architecture Yields 2700 MOPs Performance

The PalmDSPCore is a true parallel dual-MAC architecture offering industry-leading performance for processing intensive
applications while allowing clock frequency to be minimized to reduce power dissipation. The PalmDSPCore sustains an
equivalent of 3 OakDSPCore instructions per cycle, yeilding 450 OakDSPCore-equivalent Mips at 150MHz while remaining
the lowest power consuming core in its class. The parallel dual-MAC architecture also yields up to 2700 million operations
per second (MOPs), with up to 18 OakDSPCore equivalent operations in 1 cycle using multi-parallel instructions.
PalmDSPCore also supports SIMD (Single Instruction Multiple Data) and MIMD (Multiple Instruction Multiple Data) style
instructions.

DSP Group's experience with customer designed embedded DSP systems has led to the identification of architectural features
which make the most efficient use of the gate densities achievable with the latest deep sub-micron technology. Special efforts
were made by DSP Group to optimize the PalmDSPCore to meet the marketing requirements of VLSI's customers. Statistical
analysis of algorithms in such applications as GSM EFR, CDMA, Dolby AC-3 and xDSL modems provided by VLSI were
taken into consideration during the development stage by DSP Group.

In cross-coupled MAC paths, the product of one multiplier can be fed into either add/sub unit thereby extending the flexibility
of the DSP to include a wide range of non-FIR orientated algorithm. As an example, a Radix-2 complex FFT butterfly can be
efficiently executed in 2 cycles.

New Level of Flexibility for a Wide Range of Applications

The PalmDSPCore is designed for flexibility, allowing customers to optimize system cost, performance/power budget
trade-offs to best meet the needs of their specific application.

Recognizing that cellular and audio applications differ in their needs for data precision, the PalmDSPCore is offered with 16,
20 or 24 bit data paths. Similarly, the PalmDSPCore does not impose a single instruction format but offers three types of
instruction: 16 bit, 32 bit parallel and multi-parallel. This choice allows the designer to achieve optimum code density for
reduced system cost.

The new PalmDSPCore also has a flexible co-processor interface that allows hardware accelerator blocks to be easily
integrated to better meet the requirements of different applications. Synthesizable Design Coupled with Extensive
Development Tools

PalmDSPCore is a fully synthesizable 'soft core' design that can be easily ported into different technologies and foundries
using fully automated methods. VLSI's JumpStartDSP(TM), a code development and debug package specifically tuned to the
needs of embedded systems, supports the PalmDSPCore. Availability

Final development chips for the PalmDSPCore are expected to be generally available in Q2, 1999. Development tools and
preliminary models for advanced architectural evaluation are expected to be available in Q4, 1998.

About DSPG

DSP Group, Inc. (NASDAQ:DSPG) is a leader in the development and marketing of high-performance, cost-effective digital
signal processing cores, used in a wide range of applications for industries such as wireless communications, telephony and
personal computer. By combining its DSP core technology with its advanced speech processing algorithms, DSP Group also
delivers a wide range of enabling application-specific DSPs. DSP Group is located in Santa Clara, California. For more
information, visit DSP Group's web site at - dspg.com.

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