SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Intel Corporation (INTC)
INTC 37.51-0.8%3:59 PM EST

 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: Mary Cluney who wrote (55709)5/17/1998 12:15:00 AM
From: Time Traveler   of 186894
 
The reason why the die size grows bigger why feature size shrinks is that the bigger the die size the higher power dissipation it can sustain until case-to-ambient thermal resistance (heat transfer capacity) is dominant.

The higher the frequency of operation the higher is the power dissipated. Since Intel has demonstrated a P-II able to run at 500+MHz with adequate cooling, the easiest way is just to increase the die size. With added increase in silicon real estate, more features are thus added, like an FPU, MMX extension, L1 cache, and very soon L2 cache. We have seen this trend through out the development of CPUs, from 8088/86 to P-II.

However, increasing the die size to processors that cannot run at higher speed despite adequate refrigeration have no affect, obviously (K6 being an example). Perhaps, Kurlak is only looking at K6 when he made that faulty analysis.

Time Traveler
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext