Hi all; EE-Times articles of particular interest to DRAM:
I found this one interesting. In it, Elpida implies if no Rambus license agreement, then no RDRAM part production. This is sort of the flip side to Rambus' threat of not licensing vendors who lose lawsuits. If a vendor can't negotiate a license for Rambus IP, they are definitely not going to be making any RDRAM:
NEC-Hitachi spin-off, Elpida, eyes SDRAMs
Less clear is Elpida's Rambus plans. The company's 256-Mbit Rambus DRAM, based on 0.13-micron design rules, is slated to come out in the fourth quarter of 2001, according to the road map Yasui presented. However, this differed from a road map later provided to the press, which showed the 0.13-micron 256-Mbit RDRAM being introduced at the same time as the DDR and SDRAM products.
The discrepancy stems from unresolved licensing and royalty issues between Rambus and the new company, an Elpida spokesman said. Both Hitachi and NEC have signed royalty payment agreements with Rambus Inc. covering RDRAM, SDRAM and DDR technologies, but those are due to expire by year's end when Elpida takes over the product line. "We don't have a strict schedule for Rambus [DRAM] because we need to get an agreement with Rambus," an Elpida spokesman said. "We are trying to start negotiations that will influence the start of the development."
techweb.com
The above, combined with this next, would imply that Intel might be willing to put a little pressure on Rambus to be reasonable re SDRAM and DDR:
Pessimistic forecast tied in part to Europe's fortunes Oct 2, 2000
"The transition from Pentium III to Pentium 4 is dependent on how quickly other vendors roll out chip set support for the Pentium 4," Massimini said. "There is not enough Rambus DRAM available to be the exclusive solution for the P4 ramp-up, and Intel's chip set won't be ready until the second half. So Intel's success in that period of transition will be dependent on folks like Via." [said Salomon Smith Barney semiconductor analyst John Joseph.]
techweb.com
Sun's Ultrasparc III comes with a 288-bit wide SDRAM memory bus, [that's quad SDRAM channels for those of you out there that doubt the existence of dual SDRAM channels], and at only 75MHz, giving 2.4GB/sec bandwidth. This is a good example of how bandwidth can be obtained by "width" instead of "band":
Sun recasts multiprocessing in 64-bit Ultrasparc III box
In most multiprocessing servers, CPUs vie for access to a single bank of memory guarded by an off-chip memory controller on a system bus. In the Net Effects systems, the on-chip controller will eliminate that bottleneck and speed links to memory over an expanded 288-bit external system bus.
techweb.com
Why it is that discrete DRAM is going to largely disappear from volume markets 5 or so years from now:
Different PATHS To INTEGRATION
Lately, embedded DRAM has become a hot SoC function.
...
"From what we've seen, the customer doesn't really care," Lucent's Ayukawa said, adding that the customer wants to deal with one component for reasons of cost and component reduction. "Many times, this approach is more cost-effective than trying to put a big hunk of DRAM into a system-on-a-chip," he said.
...
IBM is also offering a "system in a package" that, for many applications, provides faster access to memory than a single-chip SoC with embedded DRAM or SRAM, according to Lange, who described the product as "something between a multichip module and a single-chip SoC."
In this technique, IBM solders one chip to another to foster direct communication between the two. "In the package, it looks like one chip, but it's really two," he said.
techweb.com
-- Carl |
