Here's a nice customer testimonial and a sale...
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Wednesday October 27, 9:31 am Eastern Time
Company Press Release
China's Leading IC Design Center Chooses Cadence for Deep Submicron Designs
Heralded 909 Design Project to Rely on Cadence's Front-to-Back Flow for High-Speed, Deep Submicron Designs
SAN JOSE, Calif.--(BUSINESS WIRE)--Oct. 27, 1999-- Cadence Design Systems, Inc. (NYSE: CDN - news), the world's leading supplier of electronic design products and services, today announced that the China Integrated Circuit Design Center (CIDC), the largest design center in China, will use Cadence technology and flows to design deep submicron integrated circuits (ICs) for intelligent cards, communications, multimedia, network, and other applications.
CIDC, established in 1986, is China's key high technology enterprise focused on the development of electronic design automation (EDA) technology and IC products. CIDC is part of the 909 Design Project, a government push to further develop the semiconductor industry in the country.
''We have been a satisfied Cadence customer for many years, and this latest agreement further strengthens our relationship. As a primary member of the 909 Design Project, CIDC is designing circuits in a deep submicron, high-speed, mixed-signal environment. Cadence offers the best design solution for the challenges we face,'' said Professor Qin-Sheng Wang, Chairman and CEO of CIDC.
''CIDC is the premier design center in China, and Cadence is delighted that CIDC has put its confidence in our ability to provide the best solutions for deep submicron design,'' said Jean Claude Broido, senior vice president and general manager of Asia Pacific for Cadence. ''CIDC's integration of the front-to-back design flow from Cadence will give CIDC the most productive design environment to support development of the highest quality products.''
In the past decade, CIDC has relied on Cadence technology for IC design, circuit logic simulation, synthesis, fault simulation, static timing analysis, design planning, placement and routing, and layout verification. The latest agreement includes additional technology such as the Affirma(TM) native compiled Verilog® simulator, Envisia(TM) place-and-route DSM, Envisia synthesis tool, and the System Level Constraints Timing-Driven Design flow, and cements Cadence's position as CIDC's primary EDA solution provider. |
