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Politics : Formerly About Advanced Micro Devices
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To: Scumbria who wrote (59938)5/28/1999 9:27:00 PM
From: grok  Read Replies (1) of 1576009
 
Re: <I'm not attacking anything. I thought we were having a discussion about CPU architecture.>

(I spent a hunk of time this afternoon typing up a reply but somehow it didn't post. Below is an abbreviated version):

Sorry. Let's continue the discussion. You suggested that the memory hierarchy is the bottleneck and I won't argue with that. However, IA-64 does quite a lot to improve the situation. (Abbreviated list):

* Reducing memory traffic by providing lots of registers, 64 int and 64 fp/mm
* Speculative loads with check instructions allowing loads to be hoisted above conditional branches without triggering memory exceptions.
* Line fetch instructions which allow the program to suggest that the implementation might move a cache line from one level of the hierarchy to another if it feels like it.
* Branch prediction hints which reduce mispredicted branches.
* Instruction prefetch hints which reduce cache misses.
* Register stack which allows procedure call/return without reg spilling.
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