Vendors Chip In On Rival MMX Standards
By Kelly Spang
Boston
5:50 p.m. EST Thurs., Feb. 5, 1998
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Factions in the Socket 7 platform are coming together to define a common set of 3D graphics instructions as chip makers join forces against Intel Corp.
Advanced Micro Devices, Inc., Integrated Devices Technology, Inc. and National Semiconductor Corp. are in discussions to develop a common standard to extend MMX capabilities in next generation processors which should start appearing in the channel by the second half of this year.
Where MMX falls short is on floating point operations, which are necessary to accelerate 3D graphics, said Michael Steele, product manager for AMD's K6-3D processor line.
"We have talked with Cyrix and IDT and things look promising for the potential of bringing the technologies together," Steele said.
While nothing has been finalized the three companies are "very close on agreeing on a common standard," said Jamal Haider, director of marketing for Centaur Technology, Inc., an IDT subsidiary. Haider said he expects an agreement to be final by the second quarter.
Last fall, Cyrix, AMD and IDT each announced the development of its own extensions to MMX, each company claiming to add more than a dozen new instructions to improve 3D graphics performance.
If talks are successful, the end result is to have a unified set of graphics extensions for ISVs to support across the Socket 7 platform, Haider said.
VARs will see implementation of the new graphics instruction in the WinChip C6+ processor line from IDT, Santa Clara, Calif., scheduled to ship this summer starting at 240 MHz and 266 MHz.
AMD, Sunnyvale, Calif., will add instruction sets in its K6-3D family, scheduled to ship by the end of the second quarter of this year at speeds of 300 MHz and then increasing to 350 MHz. AMD is already sampling its K6-3D and Steele said he didn't see anything interfering with the shipping schedule.
Cyrix, a Richardson, Texas-based subsidiary of National, will integrate new graphics instruction into its Cayenne core. Processors based on Cayenne technology are expected to be available in the second half of this year with performance starting around 300 MHz.
Intel, Santa Clara, Calif. recently announced its own extensions, dubbed Katmai instructions, which will increase the throughput for floating point instructions and builds on current MMX instructions. In total their are 70 new Katmai instruction which will appear in processors, also called Katmai, to be introduced in the second quarter 1999.
Katmai will be based on the current Slot 1 Pentium II form factor and will fit into existing motherboards.
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