From Zoog,>
To QSI: TXN:s stake in wireless
by: Zoogin97 (8/M/Solvalla)
22308 of 22308
To the Q SI-guys who wonder what TI:s stake in the wireless future is
Source: PR Newswire, May 24
Third-Generation Wireless Base Stations and Telecommunications
Infrastructure
TMS320C6203 DSP Today Designed into Eight out of Top 10 3G Wireless Base Station Original Equipment Manufacturers
HOUSTON, May 24 /PRNewswire/ -- The world leader in digital signal
processors (DSPs) and analog, Texas Instruments (NYSE: TXN) (TI), today
introduced the industry's fastest DSP that runs at 300 megahertz (MHz).
The new device integrates 7 megabits (Mbits) of memory, the largest
amount of memory on any single-core DSP to date. The combination of
speed, performance and integration will drive multi-channel,
multi-function applications like third-generation (3G) wireless base
stations, telecommunications and network infrastructure equipment. See
www.ti.com/sc/c6000.
Executing 2400 million instructions per second (MIPS), the TMS320C6203
reduces the overall system cost by packing more channels into less
space with lower per-channel power consumption. Among the companies
which have made the decision to use the 'C6203 in their 3G wireless
base stations is Ericsson, the world's largest supplier of wireless
systems. In making its choice, Ericsson cited the high level of system
integration and performance offered by the 'C6203.
"Designers can begin developing today because the new 'C6203 is code-
and pin- compatible with the currently sampling 'C6202 at 250MHz," said
Pradeep Bardia, product marketing manager, Texas Instruments. "The
'C6203 is the sixth code-compatible member of the world's
highest-performing DSP platform which clearly shows that TI is not just
making promises for DSP performance: TI is delivering many products on
the industry-leading performance architecture."
TI's Innovative New Process Enables Increased Speed and Integration
The 'C6203 breaks ground with a new 0.15-micron L-effective
(0.18-micron drawn) Complementary MOS (CMOS) manufacturing process,
both increasing transistor speed and lowering power consumption to
allow a higher level of integration in minimal space. The device
operates with a 1.5-V internal voltage and 3.3-V I/O voltage; therefore
it only consumes 660 mW of CPU power while executing 2400 MIPS at 300
MHz.
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