Re;
NGIO
Next Generation I/O (NGIO) is the project name for a new peripheral interconnect system. The system has been proposed by the NGIO Industry Forum, which consists of Intel, Dell, Hitachi, NEC, Siemens, and Sun Microsystems. It is an outgrowth of an earlier project to create a clustering system for Intel hardware and Windows NT, known as the Virtual Interface (VI) architecture. This clustering system defines software and hardware requirements for creating a system area network (also called a SAN) that has been demonstrated by IBM and other vendors in a multi-server database system. Future I/O also borrows from the concept in VI architecture of using the Windows Sockets API as the communications protocol medium between nodes.
NGIO, however, combines external (between separate computers) and internal (within a single computer between the CPU and peripherals) interconnects through high-speed serial links to a switch. Rather than replace the format for peripheral cards, at the end of each connection point is a PCI bus. Other connection points can directly interface with Fibre Channel devices.
NGIO introduces Channel Adapters connecting into a switch fabric. Host Channel Adapters are directly connected to the main bus of the processor unit, linking processors and memory to the NGIO switch (see Figure 4). Target Channel Adapters at each peripheral unit connect directly to peripherals or to PCI (or other buses) on one side, and to the switch fabric on the other. There may be multiple physical links between the Channel Adapters and the switch itself. Each link is a high-speed serial connection capable of running at speeds of 2.5 GBps (about 200 MBps). And unlike PCI, which has 100 separate pin connections, these serial lines only need four pins, thus saving in cost.
Figure 4. Next Generation I/O
NGIO changes the method that the CPU uses to transfer data. Instead of the directly synchronized transfers between the peripheral and a CPU, NGIO uses messages to create packets of data that can be sent between each Target Channel Adapter and the Host Channel Adapter. Even I2O, which offloads I/O processing from the CPU to the I/O controller, still uses synchronous communications, which is clearly a limiting factor. NGIO's asynchronous communication frees the CPU from having to wait for data from the slower peripherals. With multiprocessor systems, this becomes even more important, as processors tend to compete for the slower peripheral bus.
NGIO devices can be up to 17 meters away from the switch, running at speeds of up to 2.5 GBps per Target Channel Adapter. As for total number of devices, NGIO supports a 16-bit addressing scheme, allowing over 65,000 separate devices. NGIO can also connect multiple switches together to create a hierarchy of peripheral systems.
Need help from the networkers.......
So this I/O contender is backed by SUNW, and will make BIG use of a switched architecture....If ADPT back multiple standards what is to stop ANCR from helping these folks?
Q)
1. Does ANCR technology move to this new Spec if SUNW wanted them to work on it?
If anyone here talks to ANCR regularly ask them about NGIO?
Thanks in advance........ |
