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Electroglas integrates inspection, test, and analysis of bumped wafers
A service of Semiconductor Business News, CMP Media Inc.
Story posted 7:30 p.m. EST/4:30 p.m., PST, 7/8/99
SANTA CLARA, Calif. -- Electroglas Inc. here today unveiled two new wafer probers and an integrated solution that unites automated inspection, probers, and yield management tools for bumped-wafer testing and analysis.
Using a common format for sharing data over the network, Electroglas' QuickSilver automated inspection system will be able to share bump inspection wafer maps with the new EG4/200 and EG5/300 probers as well as with the Horizon 4090 line of probers. Inspection results can be transferred to other software programs for yield analysis, and accessed at the wafer manufacturing level, allowing customers to identify and correct defective steps in the process.
Such an integrated solution will help customers to improve yields and decrease the cost of ownership of inspection and test tools, according to Curt Wozniak, president and CEO of Electroglas.
"The wafer manufacturing, test and packaging processes continue to increase in complexity as integrated circuits are packed with more features," he said. "Electroglas firmly believes that to keep pace with these complexities, data gathered during each step in the process must be shared both upstream and downstream.."
QuickSilver visually inspects 100% of the wafer bumps using state-of-the-art scanning technology. Results are stored in a database that can be accessed by both the inspection systems and the probers. Electroglas' SORTview software turns these results into a wafer map that it shares with the EG4/200 and EG5/300 probers. Using the wafer inspection maps, the prober skips testing die that have already been identified by QuickSilver as defective.
Allowing the prober access to the inspection data significantly reduces probe-card damage from testing bad bumps, Wozniak said. "In addition, the entire process becomes more efficient because the prober does not spend time testing bad die," he added, which greatly reduces the likelihood of packaging bad die."
Inspection results from QuickSilver can also be accessed for analysis by Electroglas' YieldManager and SPaR software systems. YieldManager, developed by Knight Technology, a division of Electroglas, helps to identify sources of semiconductor yield loss. SPaR, based on algorithsm developed at the Oak Ridge National Laboratory in Oak Ridge, Tenn., allows for user-defined classification of defect wafer maps.
By integrating the QuickSilver data into these systems, customers can feed data both upstream (to the fab) and downstream (to the packaging and assembly area) to help optimize the entire process.
"Industry forecasts predict that more than 20% of all ICs will use bump technologies within the next five years, and for high-end applications, such as microprocessors, it is expected to be even higher," said Joe Savarese, vice president of business development and general manager of Electroglas' Inspection Products Division. "This shift in the industry is being driven by products with increasing space restrictions and electrical performance requirements, such as those in the portable applications market. The bumping process brings with it a whole new set of demands, a subset of which Electroglas is addressing by offering this complete bump sort-floor solution."
At Semicon West in San Francisco next week, Electroglas will introduce the EG4/200 and EG5/300 probe systems. The EG4/200 addresses wafer probing needs for system-on-a-chip (SOC) devices while the EG5/300 is specifically redesigned for 300-mm wafers.
"Industry trends such as bumped wafers, parallel die testing and high-pin-count applications are driving a new set of wafer probing requirements," said Jeff Hintzke, marketing director at Electroglas. "Probe loads on advanced devices are approaching 75 kilograms today and continue to increase."
Electroglas extended the capabilities of its 4090 family and added a unique probe centered z-drive system, Hintze said. "This new z-drive system virtually eliminates chuck deflection under high probe loads--a serious problem today."
The EG5/300, designed for 300-mm wafers, can also handle 200- and 150-mm wafers. It uses a closed-loop motion control on all axes for high probe-to-pad accuracy. It also features a modular design for flexibility, high load capacity, a state-of-the-art vision system, and advanced wafer handling. The stepping accuracy of the EG5/300 is better than +/- 1.5 micron and is capable of speeds greater than 20 inches per second with an acceleration 1 g.
"The 300-mm transition appears to be finally upon us," said G. Dan Hutcheson, president of VLSI Research Inc., the San Jose-based semiconductor equipment market researcher. "While increased wafer size is often viewed as a front-end problem, there are also a number of issues facing the test and assembly areas. Besides the obvious problems caused by the larger wafer, there a number of emerging technologies, such as solder bumps and chip-scale packaging, that present their own set of challenges.
"Electroglas has taken a blank-sheet approach to address these challenges with a completely redesigned prober optimized for 300-mm probing requirements. This is something worth looking at this year at Semicon West." |
