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Politics : Formerly About Advanced Micro Devices
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To: Saturn V who wrote (65013)7/12/1999 10:59:00 PM
From: fyo  Read Replies (1) of 1579972
 
Saturn V - Re: I shall clarify my statement. The K-6 and K-62 will become memory starved at very high MHZ because of sharing a common bus for L1 & L2.

L1 and L2 do not share the same bus. The system memory and the L2 do. This is a problem in that the L2 cache frequency is static - as opposed to architectures, where the L2 is a fraction of the CPU frequency. (Thus the architecture would, all other things being equal, scale worse with frequency).

--fyodor
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