SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices

 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: fyo who wrote (66046)7/19/1999 12:50:00 PM
From: Ali Chen  Read Replies (1) of 1576528
 
Fyo, <a 133MHz FSB and Rambus DRDRAM could well...SPECfp...>
If we want to be in a "dream" mode",
how about a 266MHz-SlotA with 2MB cache and 133MHz DDR DRAM
(266 MHZ data rate) on the memory side?

<the benefit of SSE> I believe there will be no
much benefits of SSE (nor 3Dnow) in foreseeable
future for SPEC benchmarks. The reason is that
the data/instruction flow for efficient SSE
application must be hand-crafted. The
FORTRAN libraries used in SPEC were polished
over years of verification in scientific
communities, and they are not going to
change overnight. Although there could be
some partial effect when using prefetching
instructions that are relatively easy
to incorporate into generic compilers.
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext