SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : LSI Corporation
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: Grand Poobah who wrote (19599)8/4/1999 3:21:00 PM
From: Lucinos  Read Replies (1) of 25814
 
Grand, I would like to add one comment to Patrick's in regarding to the item #4 in your post.

There are only a few applications (for instance of some DSP design) that you would like to drop the FPGA design directly to the ASIC chip. For the majority of them, it is not the best way of using the FPGA on ASIC. Just as described by Patrick, the FPGA core can serve as a new feature to the whole design library feature set of ASIC. The adoption of FPGA core to ASIC can add more flexibility to the ASIC circuit especially at the system level. With this extra dimension of freedom for system on chip design, you may not only make some application possible but also can even make certain ASIC design occupies less space on silicon (To me, the inefficient usage of silicon space is only true for a pure FPGA chip. We should not apply it to ASIC+FPGA).

So, on the contrary, to use the debugging capability of FPGA on ASIC is not the purpose for adding the FPGA to ASIC. Thanks.

Lucinos
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  

HomeMailHotSubjectMarksPeopleMarksKeepersSettings
Terms Of UseContact UsCopyright/IP PolicyPrivacy PolicyAbout UsFAQAdvertise on SI
© 2025 Knight Sac Media.  Data provided by Twelve Data, Alpha Vantage, and CityFALCON News