SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices

 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: Charles R who wrote (68814)8/14/1999 2:18:00 PM
From: Elmer  Read Replies (1) of 1573902
 
Re: "If true, this could create an interesting dilemma though. With the current PIII-core, increased L1 cache improves performance but reduces scalability (speed-wise). I am looking forward to see how the MHz battle plays out."

My Intel contacts say that L1 access is not the speed limiter, despite the claims of someone on this thread.

EP
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext