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Politics : Formerly About Advanced Micro Devices

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To: Scumbria who wrote (69362)	8/20/1999 8:57:00 PM
From: Tenchusatsu	Read Replies (1) of 1574214

Scumbria, regarding multi-cycle L1 caches, I have the latest Microprocessor Report in front of me (August 2, 1999). There is one table here with an exhausive list of features for the processors that will be competing in the beginning of the year 2000. One of those features is "L1 Access Time," and it lists it as 2 cycles for Coppermine, and 1 cycle for Athlon. They aren't marked as estimates, either; MDR claims these values are straight from the vendors themselves. What's up with that? Typo? Tenchusatsu

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