SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices

 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: Tenchusatsu who wrote (70994)9/4/1999 5:04:00 AM
From: Pravin Kamdar  Read Replies (3) of 1575543
 
From the link I posted last night:

The next-generation version, the EV-7 (or
21364), is scheduled to tape out in December. It's intended to support clock
speeds in excess of 1 GHz and will include 1.5 Mbytes of integrated L2 cache, a
6-Gbyte/ second direct Rambus memory controller, a 3-Gbyte/s I/O interface and
a direct processor-to-processor interface. The package is designed to support
large-scale multiprocessing and high-availability systems.

Even with Alpha and Ultrasparc in the picture, Intel believes it has licked the one
paper spec that has kept it from pushing to the front of the pack: floating-point
performance. Merced will deliver 6 Gflops of single-precision floating-point and 3
Gflops double precision.


No comment on these figures? I would think a 64 bit K8 could match or beat the Merced numbers.

Pravin.
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext