Hi John Walliker; Re current consumption. Conclusion: RDRAM uses more power than DDR when comparing same sized systems set up to have equal bandwidths. I know that this is a long post, but real engineering never was particularly easy, nor is reading, understanding , and calculating using extremely complicated memory data sheets.
Thanks for responding in detail to my post. It is true that I was comparing parts with two different power voltages. The RDRAM part was 2.5V internal, while the DDR and SDRAM were 3.3V internal. This was quite unfair to the DDR and SDRAM, as currents decrease with advances in geometry (and decreases in voltage) but even though I gave the advantage to RDRAM, the other two technologies still used a lot less power. This was obvious to anyone who is capable of reading a data sheet.
Which reminds me. Regarding the VOLxIOL power, you say Not very much power. But your calculation for VOL x IOL is wrong by a couple orders of magnitude. The figure you quote, 0.3v X 1mA is so small that the engineers would never have put it on a data sheet, as it is not worth worrying about. I will let you correct your own calculation.
Comparison of Samsung RDRAM to IBM DDR.
So this time, for the power consumption figures, lets compare apples to apples. You note that in a large memory system, most RDRAMs will spend most of their time in standby mode. You quote 105mA max. Funny, my KM416RD8C/KM418RD8C data sheet from Samsung, downloaded today, gives 120mA max. There are several types of RDRAM, I chose the version that got INTC's okay. There are also two specifications, one for 600MBps and the other for 800MBps speeds. My guess is that you chose the 600MBps current numbers by mistake, as my data sheet lists 100mA for the standby current at 600MBps. Not that much difference.
The thing to notice is that this current is the least that the RDRAM can consume, and still be available for a minimum latency access.
Now take a look at the IBM 256Mb Double Data Rate Synchronous DRAM specifications (IBM0625804, IBM0625404, IBM0625164, IBM06254B4). This is also a 2.5V part, but it has twice the storage capacity of the RDRAM. This is consistent with the huge expanse of wasted die on DDRs.
(Aside: What do you rambus bulls think the 30% extra die does? To imagine that it does anything other than emit heat is to fail to understand the components that make up integrated circuits. There is nothing you can do on a chip which fails to use up power, and that includes routing as well as transistors. And the claims that rambus is a better solution in all ways... Sometimes I expect that the rabid no-nothings on this thread are going to start claiming that rambus will fix impotence problems. The fact is that engineering is always about trade offs. There are no free lunches in engineering. In addition, there doesn't exist some small group of engineers that are many times as smart as the rest of them, and if there did exist such, they certainly wouldn't be working over at RMBS, they'd be making real products for real companies. My opinion.)
Anyway, on the DDR, I'm using the specifications of the "-10" part, which is slightly higher in current than the "-12" part. Its minimum (double rate) cycle period is 7ns (using CL=3), and being 16 bits wide, it therefore has a bandwidth of 4.6Gbps. The RDRAM chip is also 16-bits wide, but has a 1.25ns cycle time. This gives it a bandwidth of 12.8Gbps. The ratio between the parts is 2.8, which means that, all else being equal, you need 2.8 IBM DDRs to get the bandwidth of one Rambus RDRAM.
(Incidentally, this factor of 2.8, along with the fact that the IBM is twice the size, means that rambus chip is around 5.6 times "wider" than the DDR. This figure is used later in this post in order to correct the numbers for the power consumption of the active RDRAM chip. For those of you that have trouble imagining fractions of DRAMs, approximate 2.8 by 3, and assume that the two memory systems being compared consist of 3 DDRs operating in parallel versus 6 RDRAMs operating on the same channel. The two systems thus have the same number of bits (i.e. 384 Mb = 48MB), and have almost the same total bandwidth (i.e. 13.8Gbps and 12.8GBps). I will post, later on, a calculation for the latency comparison between these two systems, the DDR is much better in actual use, I believe. The Samsung white paper that concludes RDRAM has slightly less latency than PC100 SDRAM is a joke, due to a calculation error, at least as far as PC memories are concerned. I will compute the difference in total latencies when the two systems are connected to an Athlon.)
The maximum operating current for the IBM DDR is also 120mA, but to get that high requires that the part have all 4 banks active and be in burst mode, with gapless data. If the memory is big enough to have multiple DIMMs, it is likely that some DRAM will be left in the equivalents of standby modes, which will use either 30 or 60mA. In other words, this is the worst possible DDR power consumption. For memories that are even more "tall" (i.e. more size bound rather than size/bandwidth balanced as the current example is), the ratio in power consumptions tilts even further in the favor of DDR.
Just based on the above figures, we get that the IBM part requires half the power per bit, and this is before we take into account the incredibly high power consumption of the active rambus part, 700mA in write mode, 575mA in read mode. (Read mode figure is before taking into account output drive, the calculation John Walliker botched).
You know, it truly stuns me that anyone could blow that output drive power consumption figure by so many orders of magnitude, but still be willing to post to a thread as if they understood a data sheet. Everybody knows that controlled impedance traces take a lot of power to drive, and there is no reason for including trivial amounts of power to a spec. I swear! These rambus bulls really believe you can get something for nothing!
After taking into account Samsung note (b), the read current for a reasonably specified impedance bus works out to be around 250mW. Consequently, I will approximate both the read and write currents at 700mA. (Note: This doesn't take into account the power consumption on the control pins on that nasty RDRAM RLS bus, 13 pins beyond the 16 data lines, but that power is all in the controller.)
But RDRAM gives 5.6 times the bandwidth per chip, so before we add these figures into our RDRAM power, we have to divide the difference between the burst current and the standby current by a factor of 5.6. Since the standby current is 120mA, and the burst current is 700mA, this gives an average added current of 100mA per chip, for a total average current per RDRAM chip of 220mA.
Since it takes two RDRAM chips to equal one DDR chip in capacity, this gives us a power consumption ratio (active use) of (220+220)mA / 120mA = 3.7
Conclusion: RDRAM uses more power than DDR when comparing same sized systems set up to have equal bandwidths.
In addition, depending on the software running, RDRAM can end up with much higher peak currents being concentrated on just a single chip. Because of this, heat spreaders are required, and, in addition, the increase in die temperature is likely to result in early failure.
Here's a prediction. When your fan goes out on your rambus equipped machine, or when you install your cables in such a way as to partly occlude the fan, you are going to destroy your memory. These parts are incredible power hogs, and are going to run too hot to touch.
P.S. I've ignored the effects of refresh on both bandwidth and power consumption. RDRAMs are refreshed by ATTN cycles, and these use 200mA. DDRs are refreshed with CBR cycles at 135mA. Because of the greater bank granularity of RDRAM, I have the suspicion that the RDRAM requires refresh at a higher rate, but I haven't suffered through the data sheets to make the actual calculations.
I haven't taken into account the power consumption of the DDR read back circuitry. This depends on the bus loading. Since the DDR is so wide but only has one memory chip per bus pin, this bus should have very low capacitance, so the average current should be quite small. Including this figure won't change the current ratios much. Okay. Maybe I shouldn't have thrown in the read current of the RDRAM parts. But no matter how you cut it, when you are done making power consumption calculations for RDRAM and DDR, you are going to find that the DDR use less power.
Other calculations apply to the case of memory in use in a battery operated device, where the chips spend the vast majority of the time in power down mode. The DDR's self refresh current is 1mA, while the RDRAM uses 3.3mA. The memory size ratio is still two, so the DDR wins by a factor of 6.6 This applies to the guy who posted the link to the liars who claimed that their rambus RIMM was going to use half the power of conventional chips, as well.
Do I have an explanation as to why a manufacturer would claim that their parts used less power? Sure I do. If you want to know the truth, you have to do the research yourself, or get it from an intelligent, impartial third party. Try to avoid getting your relative performance data from the guy who's trying to sell you something. As an example, take a look at the INTC and AMD benchmarks versus each other's products.
-- Carl |
