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Technology Stocks : Intel Corporation (INTC)
INTC 37.89-0.1%Nov 12 3:59 PM EST
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To: Dan3 who wrote (88610)9/22/1999 1:42:00 AM
From: Tenchusatsu  Read Replies (3) of 186894
 
Dan, <How many additional cycles are required to fetch from level 2 on Coppermine when there is a cache miss in level 1? Is it just 1 extra clock?>

Nope. The latency of the on-die L2 cache is eight clock cycles. This is true for Coppermine; I think it's also true for Mendocino (Celeron) and Dixon (Mobile Pentium II).

This is better than the off-chip L2 cache of Pentium III, which I think was at least 18 clocks. Xeon's L2 latency is somewhere between 8 and 18. I don't know what Athlon's L2 latency is, but I'll bet it's comparable to Pentium III.

Tenchusatsu
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