Amit, thread, at the risk of sounding like an overenthusiastic Intel bull that accepts copouts, one of the workarounds in the article doesn't sound too bad (how's that for bet-hedging).
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A number of workarounds have been proposed, according to industry and OEM sources. The most popular suggestion
is that Intel Camino-equipped PCs could still be shipped with a cap covering the third memory slot, preventing OEMs or
users from adding more memory and destroying the stability of the system. However, it was still unclear whether signal
fluctuations in two-slot implementations still existed.
With this scheme, even though one RIMM slot out of three is unusable, you can still get 512 Megabytes in a system...not too shabby for a PC. That's the target for Rambus right now, PCs, not workstations or servers. I'll take 512 MB anyday (well, for the next year or so anyway).
The math: 2 slots X 16 chips/slot X 128 Megabits/chip divided by 8 bits per byte equals 512 Megabytes. ECC memory knocks that back a little. Of course, it says that it was still unclear whether signal
fluctuations in two-slot implementations still existed.
If the signals are ugly enough to cause memory problems, all bets are off. The fact that the article later on says maybe ECC memory only should be used in the time being says something. If the signals are a little ratty, occasional single bit errors may occur, but they are generally correctable by the ECC code logic. Without ECC, "a little ratty" could kill (make the system too unreliable).
Sometimes in the past, radically new technologies have been released in partial configs, with known problems still in the maximum configuration. This gives customers a chance to try out the new technology, while the overall system integrators, Intel and the boxmakers in this case, work out the final bugs.
Hey, I wish the whole thing worked too, but it's not the end of the world (if the two out of three RIMM solution is clean enough).
Tony |
