RE: <Someone, (I think it was you), posted a link to the Intel site that gave a list of all the RIMM modules that are currently okay by Intel. They calculated chip counts of 4, 6, 8 and 16 per RIMM.>
Yes, it was me. I just got that info from the website where Intel lists the validated RIMMs.
RE: <Another thing to notice is that the smallest number of chips they put on a RIMM was 4. This means that the actual granularity is comparable to four x16 DDR SDRAMs, which would give a peak bandwidth of about the same as the RIMM module, (i.e. 1.6GB/sec), but at a much lower cost.>
Yes, somewhat ironic isn't it. Of course, the evil step sister of granularity is max mem. Here Rambus is in deep trouble since the largest number of Rdrams that can go on a channel is 32 by hard, architectural limit. Since 128MBit chips are the largest that are remotely economical to produce today due to Rdram die penalty this means that 512MByte is max mem for Camino. Not good for a highend machine. Also, 840 will have 1GByte max mem which is not good for a workstation. Of course, I guess that's what happens when you found a company to solve a granularity problem that doesn't exist.
RE: <A funny realization I had today was that the RIMM modules require two pins per signal, one to enter the package and one to exit. This eliminates a good bit of the board pin count advantage that RDRAM would otherwise have, as DIMMs only need one pin per signal. The rest of the board space or layout advantage is probably taken by the RDRAM requirement for wider traces, spaces, and for termination, not to mention the cooling issues.>
Even more irony.
RE: <Every now and then I write something in a moment of blurry thinking, and hit the "publish" button too quickly.>
You? No way, Carl. You are always totally tactful and considerate. NOT!!!! |
