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Technology Stocks : Rambus (RMBS) - Eagle or Penguin
RMBS 101.61+2.8%Dec 5 9:30 AM EST
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To: James Fulop who wrote (31667)10/6/1999 9:30:00 AM
From: grok  Read Replies (2) of 93625
 
I've got only a little time but I'll try to report on Day One of Microprocessor Forum.

The Key Note was given by John Hennessy, a Stanford Prof and founder of MIPS. He talked about "Processor Design and other Challenges in the Post-PC Era" but he did not mention Rambus. On one slide titled: New Memory Systems" he mentioned Embedded Memory but stayed away from Rdram vs Sdram issues.

The first session was Processors for Workstations and Servers. Harsh Sharangpani presented Merced, now named Itanium. He did not mention Rambus and stayed away from memory issues. (Of course, this new Intel Micro is designed for Sdram.)

Then came Jim Kahle of IBM who presented the IBM Power 4 which is a mind blower. It has two CPUs on a chip with each at 1 GHz with a very large L2 cache and 2200 signal I/Os on the chip (5500 total pins). Four of these chips go on a module which is something like 4" square to make an 8-way multiprocessor. IT has massive bandwidth everywhere. He makes the comment: "It's the memory, stupid" and the module has 40 GB/s memory bandwidth. He didn't mention Rambus but everyone knows this product works with DDR-Sdram.

After the break Joel Emer of Compaq (formerly DEC) presented: "Simultaneous Multithreading: Multiplying Alpha's Performance." Here is a server that does use Rambus. These is the EV8 product which I believe, though not certain, is a follow-on to the 21364 which was presented one year ago at this forum and has four channels for Rdrams on each CPU. Most of his talk was on internals of micros. The EV8 supports SMT. (Meybe I'll describe it later if anyone is interested.) Slide 8 showed nine processors in a 3x3 array with each having its own memory and I/O. I believe each chip has 1100 signal I/Os. But he said very little about the Rambus channels.

Next came Michael Shebonow of Fujitsu (HaL) and he presented the latest SPARC64 V which is Fujitsu's attempt to compete with Sun. It is a large MP server chip at 1 GHz. Almost all the time was spent on the internals. Slide 13 showed System Architecture with Sdram interface.

Then Fred Weber of AMD presented Athlon. He announced 700 MHz and said the 0.18u Athlon is in production and sampling now. He showed System Logic with two Athlons connected to a North Bridge chip and four of those in a system to make an 8-way server. The Athlons have 200 MHz FSB scaling to 400. He described the Lightening Data Transport (LDT) which connects the four North Bridges.

He briefly described the x86-64 which is K8 and extends the x86 arch to 64 bits. He said that in the future they would have two x86-64 on one die. x86-64 is clearly aimed at Merced (Itanium).

He never mentioned Rdram and the current chip set all support Sdram but in the future they can, of course, switch to Rdram. [My speculation.]

Then came a panel on "Server Systems" moderated by Michael Slater. In the middle he asked: "What is the Next Generation Memory?" Justin Rattner of Intel ansered first: "DDR clearly will be the major memory technology for servers. Later maybe pin count will drive toward Rambus. If Rambus becomes dominate for Desktop it will be hard to ignore." Then Simon Steely of Compaq said: "Using Rambus in 21364 was best bang for buck." Then Chuck Moore of IBM said: "I'd like to thank Rambus for buying lunch." [Laughter from audience.] Steve Mckay of Sun said: "To what extent are servers influenced from bottom up. We believe there's room for separate design space. Rambus must show its worth on its own."

That's all I've got time for today. I'll try to pick this up later. Got to go to Day Two now.
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