SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : AMD/INTC/RMBS et ALL

 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: Don Lloyd who wrote (161)10/6/1999 3:26:00 PM
From: Bilow  Read Replies (1) of 271
 
Hi Don LLoyd; Another great PDF, though more about DDR than Rambus:

Note: Field Programmable Gate Arrays (FPGAs) are gate arrays that are programmed in the field, and can be reconfigured repeatedly. With the Xilinx Virtex, in fact, you can reconfigure parts of it while the rest of it is under use. They have a "macro" (i.e. a subschematic, or a subroutine) that implements a 100MHz DDR interface. The interface is 64-bits wide, so the total bandwidth is 200MHz * 8 bytes = 1.6GB/sec. This is very fast for a programmable part. Surprisingly, the description of the macro talks about Direct Rambus:

Virtex Synthesizable 1.6 GBytes/s DDR SDRAM Controller
While RDRAM is a revolutionary change, DDR SDRAM is a natural evolution from the existing SDRAM architecture.
...
The main advantage of DDR SDRAMs over RDRAMs is the use of the system infrastructure developed for PC-100. This eliminates the numerous design changes required by different "packet" protocols.

xilinx.com

When you compare how simple the above circuit is compared to a RDRAM interface...

-- Carl
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext