NEC puts 0.13-micron process on the fast track
By Anthony Cataldo
EE Times
(10/06/99, 5:14 p.m. EDT)
TOKYO ? In a stated bid to recapture market share lost to U.S. competitors, NEC Corp. has announced it will increase spending on semiconductor operations and shift to volume 0.13-micron production in February. The company's UX4 process will let customers mix and match logic transistor and interconnect types to optimize for performance, price and power consumption, the company said.
UX4 is intended to address Internet-ready applications. Wireless cell phones, digital TVs, digital camcorders and game consoles are on the list of applications the company wants to pursue.
As semiconductor makers come up with the means to load more transistors and functions in a die, there is a concurrent need to tap different logic transistor types to meet specific needs, the company said. It may not be practical to compromise the performance-graphics set-top box chip, for example, but if power consumption is a concern, it may make more sense to infuse high-threshold-voltage transistors into a piece of embedded DRAM.
Customer choices
Using the UX4 process, customers can select one of three types of 0.13-micron gate length (0.1-micron L-effective) transistors, which are formed of cobalt silicide. The first type, standard transistors, consume 600 microamps per micron on the n channel and 260 microamps/micron on the p channel. Internal gate delay is 17 ps.
For higher-speed implementations, such as embedded RISC, NEC will offer low-threshold-voltage transistors of a single-well construction. Gate delay is 14 ps with a fanout of 1, but on-current jumps to 700 and 300 microamps/micron for the n and p channels, respectively.
At the opposite end of the spectrum, NEC has a high-threshold-voltage transistor option for high-gate-consumption cores, such as memory. Respective on-current for the n and p channel is 350 and 150 microamps/micron. Gate delay is upped to 32 ps.
NEC conceded that including more transistor options on the same process technology will add to its manufacturing costs by requiring two to three more mask layers. But Nobuyoshi Yoshida, vice president and executive general manager of the company's System LSI Operations Unit (Kawasaki, Japan), said he has "full confidence UX4 will allow us to meet customers' cost requirements."
NEC intends to reduce development time by tailoring intellectual property for whichever transistor type is most appropriate. It will be able to create multiple libraries and won't have to spend time and engineering resources redesigning for new process technologies, Yoshida said.
Copper interconnect will be available to 0.13-micron process technology customers as an option. For clock speeds of 450 MHz or below, aluminum wiring will be offered. For anything faster ? the process will enable circuits running beyond 1 GHz ? NEC will provide copper for up to eight metal layers.
Other options include modules for six- or four-transistor SRAM cells, DRAM, flash and ferroelectric RAM. NEC said it will enable the integration of BiCMOS and analog circuitry for increased integration possibilities. UX4 supports 3.3- and 2.5-V power supplies.
Stressing the need to get UX4 on line as soon as possible, NEC said it will expand its output of wafers at its R&D center in Tsurouka, Japan from 5,000 to 6,000 wafers per month and spend an extra $142.9 million to upgrade its Yamagata facility for the new process. Driven by strong demand for advanced logic devices this year, NEC will up its spending for the entire semiconductor group this year from $1.24 billion to $1.49 billion.
This month, NEC expects to begin early sampling of its first 0.13-micron devices to certain customers, which it declined to name. By February, the first ASIC customers are slated to start receiving their silicon in volume.
Application-specific devices will be ready for shipment by the third quarter of 2000, followed by Vr41xx microcomputer products by the end of next year, according to the company's road map.
By 2001, NEC expects to start the transition to its 1.2-volt, 0.1-micron UX5 process, which will be the first to use copper as the standard interconnect. The follow-on, 0.08-micron, 1-volt UX6 process is slated for introduction in 2002. |
