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Politics : Formerly About Advanced Micro Devices
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To: Petz who wrote (75488)10/14/1999 12:18:00 PM
From: Paul Engel  Read Replies (1) of 1572969
 
Petz - re: "design clock for clock does not worry me because:
1. AMD's L2 throughput and latency can certainly be improved once the L2 moves on-chip (Athlon 0.18)"

The L2 cache will have to be at least 512K (4xL1 cache) to be useful - and guess what adding 25 million transistors (512K L2 cache) is going to do to the AthFlop die size ?

Can you say GET MUCH BIGGER?

You can say Sayonara to the cost savings in going to the 0.18 micron process.

Paul
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