SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  
To: Petz who wrote (76558)10/22/1999 9:00:00 PM
From: Paul Engel  Read Replies (1) of 1574097
 
Petz - Re: "How does going from 0.25 to 0.18 micron suddenly allow you to squeeze 8x as much cache on a chip? "

If your defect densities are LOW, good yields can still be achieved with 2 MegaBytes L2 cache, even though the die size is essentially HUGE.

Remember - Intel has been manufacturing HP's PA8500 Risc Chip with 1.5 MegaBYTES L1 cache for over a year - using the OLDER 0.25 micron process.

Proof positive that it can be done !

Paul
Report TOU ViolationShare This Post
 Public ReplyPrvt ReplyMark as Last ReadFilePrevious 10Next 10PreviousNext  

HomeMailHotSubjectMarksPeopleMarksKeepersSettings
Terms Of UseContact UsCopyright/IP PolicyPrivacy PolicyAbout UsFAQAdvertise on SI
© 2025 Knight Sac Media.  Data provided by Twelve Data, Alpha Vantage, and CityFALCON News