Dumbmoney, first of all I agree with you. However, my original response was directed at Ali, who didn't bother to put his arguments in reasonable terms like you do.
<Further, I presume that the dual-DDR chipset supports two CPUs, where the CPU bus is not shared (in Intel SMP the bus is shared).>
Well it's not very clear to me that Athlon will utilize the bandwidth of each processor connection to its fullest, just like 840 won't utilize the dual Rambus channels to its fullest. Also, I don't know what sort of I/O subsystem AMD's upcoming dual-DDR chipset will support, so my judgement on the necessity of dual DDR channels is still reserved.
<The 840 is a very unbalanced design. The CPU can't use the 3.2GB/s memory bandwidth because the FSB is a bottleneck.>
Yes, 840 is very heavily unbalanced toward the memory channel. But one memory channel would have tipped the scales too far away from the memory channel, and performance is going to suffer. After all, when you have a FSB that consumes 1.06 GB/sec of a 1.6 GB/sec RDRAM channel, you've only got 0.54 GB/sec left for everything else (AGP-4x, PCI66, UDMA, etc.) For desktop systems, that's OK, because of low utilizations. But for the market that 840 is targeting, this is unacceptable. In those markets which aren't as cost-sensitive as the desktop market, it's better to go for overkill than to penalize performance just to be "more efficient."
Tenchusatsu |
