TECHNOLOGY
The Company believes the limitations of silicon-based CMOS, BiCMOS, and ECL
ICs have become more pronounced as the requirements of the telecommunications,
data communications and ATE systems providers have increased.  While CMOS offers
certain complexity advantages over the alternative silicon processes, the
Company believes it lacks the speed required for many high-performance systems.
ECL technology offers higher speeds but at the cost of high power dissipation,
which limits its use for high-complexity applications.  BiCMOS offers higher
performance than is obtainable from CMOS, but less than that offered by ECL, at
levels of complexity which are greater than that available from ECL but lower
than that provided by CMOS.  BiCMOS is slower than ECL and, the Company
believes, does not achieve the speed necessary for the highest performance
telecommunications, data communications and ATE systems.

GaAs has inherent physical properties which allow electrons to move several
times faster than within silicon.  This higher electron mobility provides the
Company with the flexibility to manufacture ICs that operate at much higher
speeds than silicon devices or to operate at the same speeds with reduced power
consumption.  The following table compares the intrinsic transistor performance
and cost per function for H-GaAs with alternative process technologies:

                             H-GaAs      ECL      BiCMOS     CMOS
                            --------   -------   --------   -------
     Speed...............   Highest     High     Moderate   Lowest
     Power Dissipation...     Low      Highest   Moderate   Lowest
     Complexity..........     High     Lowest     Higher    Highest
     Cost per Function...   Moderate   Highest   Moderate   Lowest

The Company employs proprietary H-GaAs process technology based on a
refractory metal self-aligned gate ("SAG") process.  SAG technology is
universally used in the manufacture of complex silicon ICs.  The process
structure and logic implementation of the Company's GaAs ICs are similar to a
traditional silicon MOS process with the exception that the gate metal is
deposited directly on the GaAs substrate creating a metal-semiconductor junction
comparable to depositing the metal on a thin oxide layer grown on the silicon
substrate in the case of metal gate n-channel MOS.

The implementation of a SAG process in GaAs or silicon requires a gate metal
structure that can withstand the high temperature of an ion implant activation
anneal.  This is in contrast to conventional microwave GaAs ("RF GaAs") process
technologies which utilize a low temperature, non-self-aligned technology based
on gold as the gate metal.  The table below compares Vitesse's H-GaAs,
traditional silicon MOS and microwave RF-GaAs:

                                  Silicon    Microwave
                        H-GaAs      MOS       RF-GaAs
                       --------   --------   ---------
     Self-Aligned...     Yes        Yes         No
     Interconnect...   Aluminum   Aluminum     Gold
     Complexity.....     High     Highest     Medium

Another advantage of SAG technology in GaAs is the greater control over
electrical transistor parameters compared to conventional gold gate technology.
This control of the field effect transistor ("FET") characteristics has enabled
the Company to be one of the few companies that have demonstrated the ability to
manufacture products having lower power dissipation using direct coupled FET
logic ("DCFL").  DCFL has the highest complexity, fewest elements per logic
function and best available combination of speed at low power of any n-channel
FET technology demonstrated in silicon or GaAs.

The use of a high-temperature process also allows Vitesse to use silicon
industry standard aluminum interconnect technology.  This enables the Company to
utilize standard deposition and dry etch equipment for interconnects.  The
interconnect portion of the circuit represents a majority of mask levels in the
manufacturing process.

The Company has significantly improved its process technology:

                                                H-GaAs      H-GaAs      H-GaAs       H-GaSs
                                                  I           II         III          IV
                                                ------      ------      ------       ------

     Product Announcement Year...............     1986        1988       1991         1995
     Gate Length.............................   1.2mum      0.8mum      0.6mum       0.4mum
     Metal Layers............................      2           3           4            5
     Maximum Relative Speed(1)...............     1.0x        1.4x        2.0x         3.0x
     Minimum Relative Power Dissipation(1)...     1.0x        0.7x        0.5x         0.3x

-------------(1)  Compared to H-GaAs I.

  The Company's H-GaAs IV 0.4 micron five-layer metal GaAs FET technology is
capable of achieving higher complexity and lower power dissipation than previous
Vitesse technologies.  The Company manufactures various standard products as
well as ASICs based on the GLX family of gate arrays and the SLX family of
standard cell ICs.  The GLX family of gate arrays has been designed to offer the
same speed as the H-GaAs III family of gate arrays, but with lower power
dissipation.  This is intended to enable ICs to be packaged in a lower cost
plastic package in the 100 MHz to 800 MHz range, thereby offering the customer a
lower cost solution in this performance range.