Re: Shaky ground...
Hi Tenchusatsu,
Limited time this morning, but here's a brief response:
>>>>If "it's the latency... why should DDR make any difference ...?
Rambus starts off with poor latency but good bandwidth, and can't seem to improve the component latency. PCXXX transitioning to DDR starts out with good latency but poor bandwidth - DDR improves the bandwidth to better than Rambus while maintaining good latency. Best of both worlds.
>>>>Anand already proved that Virtual Channel technology makes virtually no impact...
Anand compared VC133 on a VIA board to PC100 on a BX board. And he ran the VC133 at CAS 3 instead of CAS 2.
The BX board is typically 3% to 6% faster than VIA on most benchmarks. The VC133 more than made up that difference. It still wasn't a good test though. We need a test with PC100, PC133, and VC100, VC133 run on the same board - only NEC has done that so far, and included a whitepaper describing testing conditions that I've posted here before, and while they show a huge improvement, I don't trust their test either (I would expect them to be biased to favor their design).
>>>>>DDR may be smaller in die size than RDRAM but the pin count is rather large for DDR memory chips and controllers.
I think Bilow has pretty thoroughly addressed the cost of pins vs. the cost of connectors, heat sinks, etc. It seems to be a wash. Pins have gotten very cheap.
>>>>>it remains to be seen whether the electricals of a 266 MHz stubby bus are easier or harder to implement than an 800 MHz continuous Rambus channel.
AMD, with almost zero experience in chipset design, was able to easily implement DDR in its connection between the CPU and the chipset. Rambus has proven a nightmare to implement, even for the most experienced chipset designer on the planet.
>>>Speaking of pin count, 840 demonstrates that it's relatively easy to move from a single RDRAM channel to dual channels.
It still doesn't do help the inherent component latency problems of rambus. And dual channels isn't just fairly easy, it's necessary in order to provide for competitive memory expansion. And it still only provides 1 open bank for expansion. And it raises costs, both for the board and for the additional rambus heat sinks, etc. Meanwhile, DDR moves from 133/266 to 200/400 next year, with latency getting even better, costs staying just as low, and the performance advantage remaining.
>>>>>Intel isn't going to write-off Rambus.
Agreed, at least not for 6 months (when their PC133 and DDR chipsets are out)
>>>>I still haven't seen the real benchmark results that prove DDR
And I still haven't seen benchmarks of PC600 and PC700 (which will be what, 70% of the available rambus, 90%, 95%?) Compared to CAS 2 VC133.
Regards,
Dan
PS, OK, not so brief :-) |
