Dan, <My post was aimed at showing how rambus would look if the "rambus glasses" were turned to favor the alternatives.>
Anyone can play that game. We see too much of that on the AMD thread. You know what that's called? Partisanship.
<When Anand benchmarked VC133, the numbers seem to indicate that he had set it at CAS 3, but the specs for VC133 call for a read latency equivalent of CAS 2 or, in a few cases, CAS 1:>
Dan, how is Anand's VC133 supposed to be CAS-3 if the specs call for CAS-2 or better? According to the specs, there is no CAS-3 VC-SDRAM, so your rejection of Anand's results on the basis of the CAS rating makes no sense.
<The key to the PC133 -> VC133 -> DDR -> DDR II upgrade path is that the bandwidth keeps going up while the latency either stays the same or gets better.>
Dan, no one promised that DDR-II would have the same or better latency than DDR. The only promise is that DDR-II would hit a rate of 400 megatransfers per second, and that it would reach a peak data rate of 3.2 GB/sec. (Funny how the 840 chipset already provides that peak data rate.) Core latency is only a very small part of the equation. Don't be surprised if the DDR-II coalition sacrifices a little core latency in order to achieve better real-world performance.
For now, the big question now is whether the effective bandwidth of DDR can match up to the effective bandwidth of RDRAM. The answer would depend on a lot of factors, including the chipset architecture, the benchmark, the type of processor, and the peripherals accessing memory in a DMA or AGP fashion.
Then after that, the question is one of production, marketing, and old-fashioned supply-n-demand. Had 820 been released on time (September), DDR would have been relegated to the niche. But the 820 delay means that DDR now has a fighting chance, not because DDR is inherently better (it isn't, despite your arguments to the contrary), but because those on the Rambus side fumbled the ball.
Tenchusatsu |
