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Technology Stocks : Rambus (RMBS) - Eagle or Penguin

RMBS 91.42

+0.9%

Dec 18 3:59 PM EST

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To: Ali Chen who wrote (34320)	11/12/1999 1:16:00 PM
From: John Walliker	Read Replies (1) of 93625

Ali, Thank you for responding to my recent posting. <If the authors had wanted to be accurate they would have noted that the traces are narrowed in the vicinity of memory chip connections so as to compensate for this by reducing the trace capacitance by an amount equal to the device input capacitance.> You have no remote idea what are you talking about, "trace capacitance". I strongly suggest you to read on the own RAMBUS design guides before expressing your illiterate opinions. I thought it would be best for me to do exactly as you suggested, so I looked up a couple of documents I have downloaded from the Rambus website. Are these the sort of things I should be reading? From RIMMModSpec051.pdf page 11 The board manufacturer must maintain 28 ohm +/- 10% impedance for the loaded and unloaded sections of all critical signal traces on the module. The critical signals include the RSL signals and two high speed CMOS signals (SCK and CMD). From RIMMDsgnGuide.pdf page 16 Stack-up and Board Thickness - These must be chosen to achieve the target trace impedance (approximately 50-60 ohms in the loaded region and 28 ohms in the unloaded region) and not to exceed the maximum overall module thickness. It must also be verified that the crosstalk limit is not violated due to thicker dielectrics and wider traces which result in tighter trace to trace spacing. page 19 Parameter Min Max Propagation delay: So [ns/m] (outer layers) 5.87 6.12 Propagation delay: So [ns/m] (inner layers) 6.67 7.00 Trace Impedance: Zo [W] (unloaded section) 25 31 Trace Impedance: Zeff [W] (loaded section) 25 31 Note that this table specifies the SAME trace impedance for loaded and unloaded sections. page 25 4.1.3 Device Pitch and Electrical Pitch Using 0.45mm via size and 0.1mm minimum trace spacing for the stripline traces TraceWidth = 0.75mm - 0.45mm - 2*0.1mm = 0.1mm ElectricalPitch = C<sub>L</sub> x Z<sub>L</sub><sup>2</sup>/[C x \|Z<sup>2</sup>-Z<sub>L</sub><sup>2</sup>\|] Where C<sub>L</sub> is the loading capacitance including the via, trace and device capacitance C<sub>I</sub> Typical C<sub>L</sub> = 0.2pF + 0.1 pF + 2.2pF = 2.5pF C is the capacitance per unit length of the 0.1mm wide trace Z<sub>L</sub> is the loaded channel impedance (28 ohm) Z is the impedance of 0.1mm stripline trace based on the chosen stackup (55.5 ohm). I think that this document shows quite clearly that Rambus modulate the trace width to achieve a constant impedance and hence propagation velocity in both loaded and unloaded sections of PCB track. I think that it also shows that if I am completely ignorant of the meaning of trace capacitance, then so are Rambus. As for illiteracy, the above document has some very clear diagrams showing what I describe. Perhaps you should read it yourself. John PS Sorry the html doesn't work very well on SI

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