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Technology Stocks : Rambus (RMBS) - Eagle or Penguin
RMBS 94.81-0.7%11:59 AM EST
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To: Ali Chen who wrote (34595)11/15/1999 11:19:00 AM
From: John Walliker  Read Replies (3) of 93625
 
Ali,

You have to check the "1ns" one more time. AFAIK, Most
signals are speced with 300ps rise time (in theory),
which equates to 2.5-3GHz bandwidth.
In practice no one knows because the Intel/Rambus
recommended equipment to observe these signals
is limited to 2.5GHz only.

JOB: rambus 13:39:12 04/09/98
***** ELECTRIC JOB PARAMETERS *****
UNIT SYSTEMS
11. GEOMETRY = mm
12. TIME = ns
13. VOLTAGE = V
CIRCUIT SIMULATION
21. CIRCUIT SIMULATOR NAME = PN-SPICE
22. NO. OF LUMPED CIRCUIT ELEMENTS = 0.1000 Lumps/mil
23. OPERATING TEMPERATURE = 35.00 C
24. MINIMUM RISE OR FALL TIME = 1.000 ns
25. OUTPUT TIME WIDTH = 50.00 ns
26. TRANSMISSION LINE TYPE = LOSSY LINE
27. MIN TX LINE ELEMENT LENGTH = DEFAULT
28. PROPAGATION DELAY DEFINITION = SOURCE+DIVER+INTERCONNECT+RECEIVER
29. KEEP TEMPORARY SPICE FILES = NO


<This is much better than I had expected. The Rambus
channel really does seem to be of very high quality.>
Yes, in theory. You know, computers can compute
equations pretty accurately these days...


Its all right, I have been playing around with component tolerances as well. Nothing awful happens until the parameters go way out of specification.


I am glad you started to research the Rambus theory
in depth. When can you get a Rambus system to
verify your findings?

I started a long time ago. When are you going to start?

First you thought that RSL signals were half routed internally and half externally and would be affected by the weather. Not true.

Then you thought that the fast CMOS signals would be out of spec, but that involved an incorrect assumption about the electric field distribution around striplines. Even if that had been true it would not have mattered:

"4.3 High Speed CMOS Signals
Since these signals are synchronized to the RSL signals, they need to match the delay with
the RSL signals. The way to achieve this is to match the impedance and length. The delay
rules of these signals are looser than of the RSL signals, but since it is very easy to match
them with the RSL routing, they follow the same routing style."

Then you ridiculed the use of stripline matching networks to compensate for the capacitive loading of the memory chips. I ran a simulation that showed the matching to be exceptionally good.

Now you suggest that theory is all very well but the results will be totally different in practice.

OK then. Go ahead and do some Monte Carlo simulations of a Rambus channel with full allowance for specified component tolerances. Don't forget to restrict the signal rise time correctly and take account of the frequency dependent lossy nature of the pcb dielectric and striplines which will greatly damp higher harmonics.

(Hint: Rambus may already have done this.)

Then let us all know what the safety margin is at the device inputs. I will be very interested to see your results. I don't see why I should do all the work myself.

Sorry, just joking a bit :) :)

Thats all right! :-)

John
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