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Politics : Formerly About Advanced Micro Devices
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To: Saturn V who wrote (85104)1/5/2000 10:43:00 AM
From: Ali Chen  Read Replies (1) of 1573952
 
Sat-V: <A superior technique would have been an implicit prefetch via hardware.The CPU could automatically preload L2 with adjacent pages for any memory operand.>

And what would the "page" be?

And what makes you think that the next requested data
is "adjacent"?

And if "adjacent", in which direction? What if the code
requires references both forward and backward?

And don't you think that your "implicit prefetch"
will cause significant bus constipation and
further increase memory latency?

BTW, the invention of a "cacheline" already solves
most of the problems with automatic L2 loading
with adjacent memory locations. And speculative
execution is there to prefetch and even "pre-execute"
code as well.

So, what kind of "automatic preload" are you guessing
for Willy?
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