Elmer, Not luck. De novo analysis. It seemed so easy and logical that I suspected I had made an error.
Years ago I made a discrete analog of the flip chip method with 4 circuit boards 1/2" apart, covered with DTL that was a digital clock. This was 1973 or so. All Dtl, hot as hell, but hey I was at play. Later I used 7490, 7447 etc and then the cmos clock chips came along
I did not use solder blobs, but lengths of wire, like vias and after assembly I cut them at selected places to make an open. Hell to troubleshoot.
That is why I suggested a multilayer flip chip design with contact pads on both sides with the use of conducting solder balls in some portions and non conducting ones in others(they would of course have to be a meltable thermoset resin ball to melt, with similar strength to the solder balls so they crush at the same rate, then harden as the solder balls are melted and cooled to make a degree of rigidity with the support being continuous from top to bottom, even if some are conductors and some insulators. I say this because if you leave out balls where you want opens between layers the fragile and brittle wafer might break, whereas it shoudl be OK in compression.
Done this way you could stack memory chips and CPU chips in a high density array, with the top and bottom being on a heat dissipating surface and the middle ones being cooled by a cooling fluid that did not conduct, since otherwise they would get hot.
Just an idea, based on my old board sandwich. It seems to me it would cut the pins needed to go to the outside world as they would go from die to die, like a multilayer board.
Of course such a thing may be unmakeable?, what do I know? But it may be a good idea? Since I am not in the field I do not want to flatter myself by thinking I have invented a solution, when this may all be old tech and done with flip chips all the time.
Bill |
