Petz, Interesting AMD article:
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Solution: Athlon vs Pentium
AMD touts the Athlon as a true seventh generation CPU. It has many features that make it superior to Intel?s Pentium III
One of the key ingredients of a high performance CPU such as the Athlon is a "wide" back end. The width of a superscalar CPU is dependent on how many calculations it can do in parallel. The Athlon has three fully pipelined floating point functional units which can process three floating point instructions per clock cycle. On the other hand, Intel's Pentium III has only two units. Moreover, only one of these is fully pipelined. The Athlon boasts a 36-entry floating point scheduler. The scheduler is critical for overall performance because it optimises the floating point instructions for maximum efficiency.
The Athlon's longer pipeline should result in CPUs in excess of 1GHz. Intel will be able to match this only with the introduction of its own seventh generation processor late next year. The EV6 protocol enjoyed by Athlon is also superior to that of the Pentium III.
Although AMD is touting the new Athlon processor as the first seventh generation X86 CPU, it does not represent a quantum leap in CPU design when compared with Intel's original Pentium. Nonetheless, this does not mean that the performance advantages are minimal. Taking a leaf out of Intel's CPU design book, AMD has included several RISC features in the Athlon. It has also included more of these features to maximise performance. We shall be discussing these in detail.
For an easier understanding of the Athlon architecture, it would be better to divide the CPU into two segments - the front end and back end. The front end is the segment that connects to the rest of the system components such as the motherboard and memory. The back end is the section where the data processing occurs. One of the key ingredients of a high performance CPU is a "wide" back end. The width of a superscalar CPU is dependent on how many calculations it can do in parallel.
For instance, consider the CPU's back end as a set of supermarket checkout counters. The more checkouts you have, the greater the number of people that can be helped. Similarly, the more processing units there are in a CPU, the better its performance.
The Athlon has three fully pipelined floating point functional units which can process three floating point instructions per clock cycle. On the other hand, Intel's Pentium III has only two units. Moreover, only one of these units is fully pipelined. Three fully pipelined floating point units mean that none of them have to stop working for the others to finish their tasks.
Floating point math is a complicated process. It takes many stages to complete. Floating point addition is simpler than multiplication. In fact, the multiplication process takes advantage of some of the addition algorithms and therefore takes longer to complete. In the case of the Pentium III, some of the sub units within the two floating point functional units are common or shared. This means that even under ideal conditions, the Pentium III's scheduler can issue only one floating point instruction per clock cycle.
The Athlon suffers from no such limitation. Its three floating point units do not share any resources. Therefore, the CPU's scheduler can issue three floating point instructions per clock. But remember, this does not automatically translate into three times better performance due to other bottlenecks. Moreover, this applies only to floating point addition and multiplication. More complex activities will hog parts of all three units. Still, under all conditions, the floating point performance of the Athlon will outclass the Pentium III.
One of the key segments of the floating point unit is the scheduler. The Athlon boasts a 36-entry floating point scheduler. The scheduler is critical for overall performance because it optimises the floating point instructions for maximum efficiency. Much of the performance gain of a modern superscalar architecture is derived from the CPU's ability to move instructions between the various processing units.
Scheduling becomes even more important when the CPU has a long pipeline like the Athlon. A longer pipeline means more execution units. Generally, this is a good thing. However, without proper scheduling, a pipeline could become stalled. The longer the pipeline, greater the number of instructions that could be held in queue while the pipeline is stalled. For instance, if the pipeline were only two or three stages, there would not be much time lost if it is held up. The Athlon has a 15-stage floating point pipeline. Therefore, it is very important to schedule the instructions correctly.
Another job of the scheduler is to constantly keep all the three execution units fed with instructions. The Athlon's scheduler can send three instructions per cycle. These instructions are stored in an 88-entry register file. From here, the instructions are sent to the various execution units.
One of the advantages of a long pipeline is clock speed. Both Intel and AMD are engaged in a furious battle of clock speeds. The Athlon's longer pipeline, along with the new 0.18 micron manufacturing process, should result in CPUs in excess of 1GHz. Intel will be able to match this only with the introduction of its own seventh generation processor late next year.
The Athlon boasts a three-stage fully pipelined integer unit as well. Together they can process three integer instructions per clock cycle. These units are backed up by an 18-entry scheduler which can send six instructions per clock. Compared to the Athlon, the Pentium III can process only two integer instructions per clock.
Before the floating point or integer schedulers can optimise and send the instructions, the original X86 instructions need to be decoded. This is because the X86 instructions are unwieldy. The large X86 instructions are broken down into what AMD calls "macro ops". The Pentium III also does the same. In effect, the original X86 instructions are emulated by the hardware. This usually does not result in a performance hit as the original instructions are rarely used.
Once the X86 instructions are decoded into macro ops, they pass on to the instruction control unit or ICU. The ICU is what keeps track of all the instructions in their various stages of execution. The ICU is 72 entries deep. This means it can keep track of 72 instructions as it passes through the execution units.
One of the Athlon's key advantages over the Pentium III is the EV6 bus. AMD licensed the EV6 bus from Digital Corporation. Unlike Intel's Pentium III which uses the GTL+ protocol, The EV6 has a point to point topology. The GTL+ has a shared bus topology. One of the disadvantages of the shared bus topology is higher noise and cross talk. This means that the motherboard design has to be of very high quality.
A shared bus means that all the devices on that channel share the available bandwidth. For instance, in a dual processor Pentium III system, the same 133MHz bus is shared by the processors. Moreover, in order to prevent both CPUs from talking to the controller chipset, one of the processors have to be designated as the bus master. Thus if the other CPU wants to use the bus, it has to request it from the bus master.
On the other hand, the EV6 is a vast improvement over Intel's GTL+. The point-to-point topology of the EV6 means that each Athlon processor has a dedicated interface to the main chipset. Therefore, there is no danger of cross talk. Moreover, the Athlon enjoys a front side bus speed of 200MHz. This is almost double the bandwidth enjoyed by Pentium III. With the advent of faster memory types like Rambus, an Athlon system is likely to show better performance gain than the Pentium III.
Overall, we find that AMD's Athlon outclasses Intel's Pentium III in almost every respect.
Ajith Ram "
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