Remember a gazillion years ago when it was impossible to resolve below 1.0u with conventional lithography and we had to prepare to use ion beam, e-beam, or x-ray lithography techniques to do it? Remember the physics involved with numerical aperture and the minimum resolutions that could be achieved without violating the laws of Physics? And remember when those damn steppers could only get 20-40 WPH on 6" wafers even though the suppliers said they could do more? The last was a ploy since they came back and said it was possible if you blind stepped first layer. We had our 6" projection aligners running at close to 70 WPH when steppers were only doing the 20-30 rate.
Who would have thought that step and scan would come into play to allow circumvent the limitations of the available field size you could use for a die? And not that it is in full implementation, but OPC and PSM have been viable "cheats" for lithography that have helped resolve smaller feature sizes.
The cost of photoresist (negative versus DUV) at its extremes boggles the mind these days but as DUV manufacturing comes on line, we will see reductions in prices here, making it more cost effective.
Just as a note, I was at Semicon West more than a decade ago when I saw something that looked like a Perkin Elmer Projection Aligner that was a X-ray litho tool. The problem with the system at the time was not cost or availability of the system itself but the limitations, cycle time, and cost of the x-ray masks which were made of Boron Nitride and Gold. This technology was never really fully implemented because we were able to bend the Laws of Physics, putting off x-ray for the time being. X-ray litho went the way of the Pioneer Laser Disc. Two shots at commercialization and new the Laser disc is nothing more than a DVD player.
Sorry for being so verbose and taking you down a boring trip from memory lane, but I wanted to try to illustrate that science improbability of today can become reality down the road.
The first e-beam direct write wafer systems I ever came in contact with had a throughput of 4 wafers per hour. that has improved over time. The original Mebes systems used by the reticle shops were extremely slow even with the larger spot size used. The new MEBES systems with all of the productivity upgrades and with the smaller spot size are faster than the first systems and have better resolution.
The road might be long but the benefits of a fast direct write system are astronomical. the cost of a reticle set is skyrocketing due to complexity and the number of masking layers required. Each new technology seems to add a layer or two<GGG>. For ASIC providers, the biggest individual cost of producing a wafer will be the cost of the lithography process. Eliminating reticles has significant cost benefits that you might be able to afford a few more direct write systems.
I was one of the first people to put multiple fields on UTEK retcles such that we could cut costs on reticle tooling. One one plate (depending on the system <standard or wide field>) could handle 3 or 4 layers. we were able to do a complete reticle set for the cost of 4 plates at a slightly higher price than 4 plates would normal cost. I did the financial justification for this and it turned out that we could buy a stepper and a half each year with the cost savings. This did not include the benefits of not having to change the reticle as often.
When I think about UTEK's Ultrabeam from Lepton and how they placed it with PLAB, it did not make sense that they wanted to get into the mask making business. They were in that business once and it was not a pretty picture. However, it did not seem reasonable that they wanted to sell units to the mask makers either since they pride themselves in low cost of ownership and high productivity systems. whatever the prejudices people might have had about 1X stepper lithography in the past, I can say without fear of contradiction, we were able to use UTEWK steppers down to 0.75 at a far more cost effective level than anything on the market. And this was broad band (gh). The company got cold feet and decided to convert to ASML for 0.50u and below so I never knew how the advance UTEK steppers would perform in production.
UTEK deals into some emerging markets that allows them to re-use old technology and extend the life cycle of their products. with TFH, Polyimide, bump, and MEMS, they should fare well.
However, they did take over ISI for the GCA DUV stepper platform and might use this as a means of getting into the DUV market as a sub player when deliveries from Canon, Nikon, SVGL, and ASML get tight. They do keep their hands in the IC litho jar with this addition. But the Ultrabeam always puzzled me.
<The above was not an advertisement for UTEK but part of the flow of thought here>
Next we move onto the ETEC-AMAT merger that also puzzles me. I do not buy the claim that ETEC was acquired to ensure the continued advances in device technology. ETEC has been able to provide the technology necessary to product the masks and reticles required for the technology developed by the IC designers. ETEC does not need help to ensure future success.
BTW - I do realize that AMAT has a stable of products that do not participate in the front-end manufacturing of ICs. So it is not inconceivable that AMAT would venture away from the traditional wafer fab products.
HOWEVER - The mask making business has consolidated over the last decade or so and the market for systems is much smaller from a customer base. With the exception of a few Pacific Rim providers and UTEK here in the states, ETEC has a virtual monopoly on the mask making equipment outside of Japan.
The final observation is the market AMAT sells into. If I can oversimplify the IC manufacturing process, I would say that it is broken down into the following:
Photo - Etch - Diffusion - Implant - Thin Films - Metrology - CMP/SOG - Cleaning
Most people include CMP/SOG in one of the other groups but it is become such an "art" that I see more and more specialization here. Of the group above, AMAT is a major player in most of the functional groups with Photolithography the noticeable exception. Since AMAT sells some of the most expensive equipment in the industry, it has always been a thorn in my side that this 500lb gorilla did not have litho under their wing. I do know that a few attempts were made in that direction and that they had a few companies like SVGL and ISI in their "take over sights." for whatever reason it did not occur, it has always been curious.
Okay, we are now in the home stretch.
Your comments are 100% on target about prototyping and we have seen niche companies provide that service. The throughput is slow but getting faster. The users of this "service" have been ASIC and Gate Array companies at the beginning. However, as all things have done in the past, I foresee a situation where throughput will be enhanced in the direct write wafer systems just like it has in the conventional exposure tools.
1. Both UTEK and AMAT now have tools in their stable to create such a tool and maybe they have ways of speeding up the throughput.
2. Unless the industry puts a halt to the shrinking of device features, we are going to run into some temporary brick wall relative to yields and process variability.
A designer ships his design off the workstation and it is converted into a database that is shipped to the mask house who then puts it through their manufacturing process. Part of that process is no different from conventional IC manufacturing. The reticle blank is coated with a photo sensitive material, it is exposed on the MEBES, it is developed, and it is etched. this process has its own variability and even with reticle repair tools, you do not get a perfect reticle. the one benefit is that many of these reticles are 4-5 times larger than the actual devices themselves such that the reduction process does minimize some of the variability.
If you have a 5X reduction and doing a 0.25u feature, you have no problem since the reticle will have a 1.25u feature which is a piece of cake to make these days. you might even be using a 0.10u spot size (which introduces some variability since you probably print a 1.30 feature and get to 1.25 via the develop and etch process). At a 0.10 micron feature on the wafer, you start with a 0.50 reticle size. as you shrink, your variability catches up with you. the most viable sub 0.1u feature size is at 0.08u these days, which is debatable since others have claimed lower feature sizes. I like the University of Texas Austin number as possible for now.
Somewhere along the line, the variability in the mask making process will be too great for the IC Process to handle (IMO), resulting in a desire to eliminate the "middle-man." The alternative is a direct write DUV system or even finally X-ray litho with its inherent costs.
Call it the RadarView Technology Roadmap and my personal opinion. I can see good reason for AMAT to take over ETEC since it is a high end tool. I can see more reason for AMAT to do it in order to finally have a wafer litho tool down the road. I saw no reason for struggling UTEK to buy the Lepton system to open such a narrow market with the mask houses since they are supposedly directed towards low cost of ownership manufacturing.
The Big deal with the SCALPEL process also leads me to believe that a next generation of litho tool could be created such as a direct wrtie system. To be perfectly honest, I never thought I would see a step and scan tool even though I saw the patent for it many years ago. It was a great idea but it just did not seem feasible at the time. just goes to show you that we should never rule out anything.
Finally, when you consider the market for ASICs and Gate Arrays along with other specialty chips, a direct write system would allow for the manufacturing of multiple specialty chips or "codes" on one wafer thereby increasing the efficiency of a wafer fab. Some of the largest downtime comes with reticle changes and with the number of smaller than optimized lots run in a fab. If eventually we migrate to 12 inch wafers across the board, you will not need 20-25 wafers per lost to produce the devices being ordered.
Having been in the ASIC business, I can tell you the costs associated with running slightly full cassettes of wafers and how it affects the throughput of many operations. with direct write, you could run full boats of wafers through the same uniform process. Of course this does not work as well in a fab that runs a few device generations or has special layers associated with them, but those are not insurmountable.
I always enjoy having a conversation with you Kathy, and look forward to your comments on these comments. I take a long term view and direct write is not necessarily around the corner in 2001 but you never know how soon after that it could occur.
Andrew
PS - I know you are probably aware of 100% of all the background material but the long winded response was for the benefit of those readers here that are not as technically minded on the subject. Therefore, these same people would probably learn a great deal from you whether you agree with me or shoot holes in my theory. Both are a learning process for all of us. |
