Ian:
Some details on reworked 815 chipset. I thought higher subsystem I/O bandwidth required RDRAM.
Intel's 'Solano' gets last-minute revision
Mark Hachman
Silicon Valley- Improvements to Intel Corp.'s I/O hub design have caused it to cancel its forthcoming Solano chipset and replace it with a successor-the Solano-2.
Industry sources said the revision will likely have little effect on the industry because the new chipset is slated to sample next month and enter volume production next quarter, which is about the same schedule as the original Solano chipset. Both versions of the device are referred to as the Intel 815.
Intel's roadmap revision has caused at least two PC OEMs to rethink their product designs, however, because the new I/O hub, or south bridge, introduces next-generation Universal Serial Bus technology earlier than expected. One OEM source said his company was evaluating whether supporting the technology justified the additional engineering costs. However, the Solano's interface to PC133 synchronous DRAM has been left unchanged, according to sources.
Intel's new chipset architecture, first designed into the Camino core-logic IC, includes two or three chips or hubs; the firmware; an I/O controller hub [ICH], which includes features such as the AC'97 link to allow integrated audio; and an optional memory-translator hub for Direct Rambus DRAM, not used by the low-end Solano.
Observers expect the second-generation Solano's ICH-2 to contain USB version 2.0 technology-a 360- to 480-Mbit/s standard that observers say is now positioned as a direct competitor to the IEEE 1394, or FireWire, technology. The spec should be ratified this quarter; peripherals are expected in the second half of the year. Intel's ICH-2 should include a 100-Mbyte ATA-100 hard-drive interface, sources said.
The Solano cancellation should not necessitate a motherboard redesign, observers said. The revision is consistent with Intel's strategy of designing new technology into its chipsets before it appears elsewhere in the system.
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