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AMD To Add On-Chip Cache To Athlon
techweb.com
Among some of the quotable quotes:
The upcoming Thunderbird device will boost performance by transforming the Athlon's current 512 kilobytes of off-chip L2 cache into 256 KB of on-die L2 cache.
The Spitfire, meanwhile, will feature a 128-KB on-die L2 cache along with its new socket infrastructure. The current Athlon chips use a cartridge packaging scheme, and Dean McCarron, principal analyst for Mercury Research, in Scottsdale, Ariz., said switching to a socket-based design could save $10 to $15 on every part.
Although the Sledgehammer will be a 64-bit processor, like Intel's forthcoming Itanium, AMD's device will use the same X86 instruction set as the current generation of processors. Sanders said it initially will target the high-end desktop PC market, not the workstation and server space where many analysts expect to see the first Itanium chips.
The first Spitfire chips are expected to ship next quarter, and will ramp up throughout the rest of the year. The Thunderbird will be slightly behind that schedule, according to Brookwood, likely appearing early in the third quarter.
Later this year or early in 2001, AMD will also roll out the Mustang, which uses the same Athlon core but features a jumbo-size on-die L2 cache. Brookwood said he predicted the cache on that device could be as large as a megabyte. The Mustang will be expected to compete with Intel's upcoming Cascade processor, which will merge a Coppermine core with an L2 cache that could be as large as 2 megabytes.
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